Abstract:
A system for probing a DUT is disclosed, the system having a pulsed laser source, a CW laser source, beam optics designed to point a reference beam and a probing beam at the same location on the DUT, optical detectors for detecting the reflected reference and probing beams, and a collection electronics. The beam optics is a common-path polarization differential probing (PDP) optics. The common-path PDP optics divides the incident laser beam into two beams of orthogonal polarization - one beam simulating a reference beam while the other simulating a probing beam. Both reference and probing beams are pointed to the same location on the DUT. Due to the intrinsic asymmetry of a CMOS transistor, the interaction of the reference and probing beams with the DUT result in different phase modulation in each beam. This difference can be investigated to study the response of the DUT to the stimulus signal.
Abstract:
A first network device is provided in communications with a second network device comprising a physical layer device. The physical layer device comprises a transmitter to transmit an autonegotiation signal to the second network device, a receiver to receive a received signal from the second network device, and a controller comprising an autonegotiation controller to set a highest common data rate between the first network device and the second network device. The autonegotiation controller compares the autonegotiation signal and the received signal and selectively prevents the autonegotiation when the autonegotiation signal is the same as the received signal.
Abstract:
An apparatus and method for laser probing of a DUT at very high temporal resolution is disclosed. The system includes a CW laser source, a beam optics designed to point two orthogonally polarized beams at the same location on the DUT, optical detectors for detecting the reflected beams, collection electronics, and an oscilloscope. The beam optics defines a common-path polarization differential probing (PDP) optics. The common-path PDP optics divides the laser beam into two beams of orthogonal polarization. Due to the intrinsic asymmetry of a CMOS transistor, the interaction of the beams with the DUT result in different phase modulation in each beam. This difference can be investigated to study the response of the DUT to the stimulus signal.
Abstract:
A cable tester includes a pretest module that senses activity on a cable and selectively enables testing depending upon the sensed activity. A test module is enabled by the pretest module, transmits test pulses on the cable, measures a refelction amplitude, calculates a cable length, and determines a cable status based on the measures amplitude and the calculated cable length. A polarity detector communicates with the cable tester and detects a polarity of at least one pair of the cable. The test module senses activity on a first pair of the cable, enables testing if activity is not detected for a first period, and enables testing of the first pair if, during the first period, activity is detected on the first pair and is subsequently not detected on the first pair for a second period after the activity is detected.
Abstract:
A physical layer device includes a cable tester that determines a cable status. A test module transmits a test pulse on the cable, measures reflection amplitude, calculates a cable length, and determines the cable status based on the measured amplitude and the calculated cable length. A first digital signal processor (DSP) communicates with a first pair of the cable and includes a first echo canceller having a finite impulse response (FIR) filter with taps and a first crosstalk canceller having a FIR filter with taps. A second DSP communicates with a second pair of the cable and includes a second echo canceller having a FIR filter with taps and a second crosstalk canceller having a FIR filter with taps. The cable tester calculates a distance to at least one of echo and crosstalk based on values of the taps of the first echo canceller and the second crosstalk canceller.
Abstract:
A self-reparable semiconductor including a graphics processing unit includes a first pixel processor that performs a first function and a first spare pixel processor. The first and first spare pixel processors are functionally interchangeable. Switching devices communicate with the first and first spare pixel processors and replace the first pixel processor with the first spare pixel processor when the first pixel processor is inoperable. A controller identifies at least one inoperable pixel processor and generates configuration data for configuring the switching devices to replace the inoperable pixel processor. Memory that is located on the self-reparable semiconductor stores the configuration data for the switching devices. A second pixel processor is functionally interchangeable with the first and first spare pixel processors. The first spare pixel processor is located one of between the first and second pixel processors or adjacent to one of the first or the second pixel processors.
Abstract:
A system comprises a physical layer device that is adapted to communicate with a cable medium and that includes a first input/output terminal. A first transceiver communicates with the first input/output terminal and the cable medium. A cable tester tests the cable medium and determines a cable status. An indicator communciates with the physical layer device and identifies at least one of link presence, link abscence, link activity, link duplex and or link speed of the first input/output terminal during normal operation. The cable tester also uses the indicator to indicate at least one of cable testing status during the test and/or the cable status after the test.
Abstract:
A system, apparatus, and method for analyzing photon emission data to discriminate between photons emitted by transistors and photons emitted by background sources. The analysis involves spatial and/or temporal correlation of photon emissions. After correlation, the analysis may further involve obtaining a likelihood that the correlated photons were emitted by a transistor. After correlation, the analysis may also further involve assigning a weight to individual photon emissions as a function of the correlation. The weight, in some instances, reflecting a likelihood that the photons were emitted by a transistor. The analysis may further involve automatically identifying transistors in a photon emission image.
Abstract:
A physical layer device (PHY) device in an Ethernet LAN is configured to permit ease of testing of its transmitter logic. The PHY device comprises a reset extension circuit for latching on the clock signals from a phase-locked loop (PLL) after the PLL has stabilized upon power-up or reset. The PHY device transmits a known valid bit pattern for testing purposes. A signal analyzer receives the transmitted bit pattern from the PHY device and compares the received bit pattern with a known valid bit pattern. A match indicates the proper operation of the PHY device transmitter logic.
Abstract:
A physical layer (PHY) device in an Ethernet type LAN is configured to permit ease of testing of the PHY device's logic. The PHY device comprises a PHY receiver, a start frame delimiter detector (SFD), and automatic checker circuitry in which the clock position and the PHY pop-up position of received signals can be determined. The automatic checker circuitry receives a data signal having a predetermined pattern corresponding to a valid data packet from a pattern generating circuit. The automatic checker circuitry outputs a verification signal indicating whether the supplied signals are valid. This arrangement supports a one pass test, which reduces production costs and testing duration.