公开(公告)号：US11239155B2

公开(公告)日：2022-02-01

申请号：US16724346

申请日：2019-12-22

Applicant: Intel Corporation

Inventor： Adel A. Elsherbini ,  Feras Eid ,  Johanna M. Swan ,  Aleksandar Aleksov ,  Veronica Aleman Strong

IPC: H01L23/522 ,  H01L23/498 ,  H01L23/528 ,  H01L23/552 ,  H01L23/00 ,  H01L27/02

Abstract: Disclosed herein are structures, devices, and methods for electrostatic discharge protection (ESDP) in integrated circuits (ICs). In some embodiments, an IC component may include a conductive contact structure that includes a first contact element and a second contact element. The first contact element may be exposed at a face of the IC component, the first contact element may be between the face of the IC component and the second contact element, the second contact element may be spaced apart from the first contact element by a gap, and the second contact element may be in electrical contact with an electrical pathway in the IC component.

公开(公告)号：US11133263B2

公开(公告)日：2021-09-28

申请号：US16573948

申请日：2019-09-17

Applicant: Intel Corporation

Inventor： Veronica Strong ,  Aleksandar Aleksov ,  Henning Braunisch ,  Brandon Rawlings ,  Johanna Swan ,  Shawna Liff

IPC: H01L23/538 ,  H01L23/00 ,  H01L25/10 ,  H01L21/56 ,  H01L21/48 ,  H05K1/18

Abstract: An integrated circuit package may be formed including at least one die side integrated circuit device having an active surface electrically attached to an electronic interposer, wherein the at least one die side integrated circuit device is at least partially encased in a mold material layer and wherein a back surface of the at least one die side integrated circuit device is in substantially the same plane as an outer surface of the mold material layer. At least one stacked integrated circuit device may be electrically attached to the back surface of the at least one die side integrated circuit through an interconnection structure formed between the at least one die side integrated circuit device and the at least one stacked integrated circuit device.

公开(公告)号：US11107781B2

公开(公告)日：2021-08-31

申请号：US16481392

申请日：2017-03-30

Applicant: Intel Corporation

Inventor： Srinivas V. Pietambaram ,  Rahul N. Manepalli ,  Kristof Kuwawi Darmawikarta ,  Robert Alan May ,  Aleksandar Aleksov ,  Telesphor Kamgaing

IPC: H01L23/66 ,  H01L21/56 ,  H01L23/00

Abstract: Semiconductor packages having a die electrically connected to an antenna by a coaxial interconnect are described. In an example, a semiconductor package includes a molded layer between a first antenna patch and a second antenna patch of the antenna. The first patch may be electrically connected to the coaxial interconnect, and the second patch may be mounted on the molded layer. The molded layer may be formed from a molding compound, and may have a stiffness to resist warpage during fabrication and use of the semiconductor package.

公开(公告)号：US11081768B2

公开(公告)日：2021-08-03

申请号：US16421989

申请日：2019-05-24

Applicant: Intel Corporation

Inventor： Brandon C. Marin ,  Jeremy D. Ecton ,  Aleksandar Aleksov ,  Kristof Darmawikarta ,  Yonggang Li ,  Dilan Seneviratne

IPC: H01P1/208 ,  H01P1/20 ,  H01P7/10 ,  H01L23/66 ,  H01P3/16 ,  H01L21/768 ,  H01P11/00 ,  H01L21/288

Abstract: A filter structure comprises a first dielectric buildup film. A second dielectric buildup film is over the first dielectric buildup film, the second dielectric buildup film including a metallization catalyst. A trench is in the second dielectric buildup film. A metal is selectively plated to sidewalls of the trench based at least in part on the metallization catalyst. A low-loss buildup film is over the metal that substantially fills the trench.

公开(公告)号：US11050155B2

公开(公告)日：2021-06-29

申请号：US16345171

申请日：2016-12-14

Applicant: Intel Corporation

Inventor： Feras Eid ,  Sasha N. Oster ,  Telesphor Kamgaing ,  Georgios C. Dogiamis ,  Aleksandar Aleksov

IPC: H01Q1/24 ,  H01Q1/38 ,  H01L23/66 ,  H01Q9/04 ,  H01L21/56 ,  H01L23/31 ,  H01L23/495 ,  H01L23/552 ,  H01Q1/22 ,  H01Q1/52 ,  H01Q19/22 ,  H01L23/367

Abstract: Embodiments of the invention include a microelectronic device that includes a first substrate having radio frequency (RF) components and a second substrate that is coupled to the first substrate. The second substrate includes a first conductive layer of an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher. A mold material is disposed on the first and second substrates. The mold material includes a first region that is positioned between the first conductive layer and a second conductive layer of the antenna unit with the mold material being a dielectric material to capacitively couple the first and second conductive layers of the antenna unit.

公开(公告)号：US20210193645A1

公开(公告)日：2021-06-24

申请号：US16724259

申请日：2019-12-21

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Adel A. Elsherbini ,  Feras Eid ,  Veronica Aleman Strong ,  Johanna M. Swan

IPC: H01L27/02 ,  H01L23/528 ,  H01L29/24 ,  H01L29/45 ,  H01L29/47 ,  H01L29/872 ,  H01L29/861

Abstract: Embodiments may relate to a die with a front-end and a backend. The front-end may include a transistor. The backend may include a signal line, a conductive line, and a diode that is communicatively coupled with the signal line and the conductive line. Other embodiments may be described or claimed.

公开(公告)号：US20210193644A1

公开(公告)日：2021-06-24

申请号：US16724257

申请日：2019-12-21

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Adel A. Elsherbini ,  Feras Eid ,  Veronica Aleman Strong ,  Johanna M. Swan

IPC: H01L27/02 ,  H01L29/872

Abstract: Embodiments may relate to a package substrate that is to couple with the die. The package substrate may include a signal line that is communicatively coupled with the die. The package substrate may further include a conductive line. The package substrate may further include a diode communicatively coupled with the signal line and the conductive line. Other embodiments may be described or claimed.

公开(公告)号：US20210193596A1

公开(公告)日：2021-06-24

申请号：US16721442

申请日：2019-12-19

Applicant: INTEL CORPORATION

Inventor： Adel A. Elsherbini ,  Feras Eid ,  Johanna M. Swan ,  Aleksandar Aleksov ,  Veronica Aleman Strong

IPC: H01L23/60 ,  H01L23/48 ,  H01L27/02 ,  H01L23/00 ,  H01L23/498

Abstract: Disclosed herein are structures, devices, and methods for electrostatic discharge protection (ESDP) in integrated circuits (ICs). For example, in some embodiments, an IC package support may include: a first conductive structure in a dielectric material; a second conductive structure in the dielectric material; and a material in contact with the first conductive structure and the second conductive structure, wherein the material includes a polymer, and the material is different from the dielectric material. The material may act as a dielectric material below a trigger voltage, and as a conductive material above the trigger voltage.

公开(公告)号：US20210175873A1

公开(公告)日：2021-06-10

申请号：US16707497

申请日：2019-12-09

Applicant: Intel Corporation

Inventor： Georgios Dogiamis ,  Aleksandar Aleksov ,  Feras Eid ,  Telesphor Kamgaing ,  Johanna M. Swan

IPC: H03H9/54 ,  H03H9/64 ,  H03H9/02

Abstract: Embodiments may relate to a die such as an acoustic wave resonator (AWR) die. The die may include a first filter and a second filter in the die body. The die may further include an electromagnetic interference (EMI) structure that surrounds at least one of the filters. Other embodiments may be described or claimed.

公开(公告)号：US10976822B2

公开(公告)日：2021-04-13

申请号：US16326902

申请日：2016-10-01

Applicant: Intel Corporation

Inventor： Georgios C. Dogiamis ,  Aleksandar Aleksov ,  Johanna M. Swan

IPC: G06F3/01 ,  G06F1/16

Abstract: In accordance with disclosed embodiments, there are provided systems, methods, and apparatuses for implementing increased human perception of haptic feedback systems. For instance, there is disclosed in accordance with one embodiment there is wearable device, having therein: a wearable device case; a plurality of actuators within the wearable device case, each of which to vibrate independently or in combination; in which one surface of each of the plurality of actuators is exposed at a surface of the wearable device case; an elastomer surrounding the sides of each of the plurality of actuators within the wearable device case to hold the actuators in position within the wearable device case; and electrical interconnects from each of the plurality of actuators to internal semiconductor components of the wearable device. Other related embodiments are disclosed.