公开(公告)号：US11824124B2

公开(公告)日：2023-11-21

申请号：US17458713

申请日：2021-08-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Kengo Akimoto

IPC: H01L29/786 ,  H01L29/49 ,  H01L21/02 ,  H01L29/66 ,  H01L29/24

CPC classification number: H01L29/78696 ,  H01L21/0234 ,  H01L21/02318 ,  H01L21/02323 ,  H01L21/02565 ,  H01L29/247 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78693

Abstract: An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.

公开(公告)号：US11695019B2

公开(公告)日：2023-07-04

申请号：US17105801

申请日：2020-11-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masayuki Sakakura ,  Yoshiaki Oikawa ,  Shunpei Yamazaki ,  Junichiro Sakata ,  Masashi Tsubuku ,  Kengo Akimoto ,  Miyuki Hosoba

IPC: H01L27/14 ,  H01L27/12 ,  G02F1/1345 ,  G02F1/1368 ,  G02F1/1343

CPC classification number: H01L27/124 ,  G02F1/1368 ,  G02F1/13454 ,  G02F1/134309 ,  H01L27/1225 ,  H01L27/1255 ,  G02F2202/10

Abstract: The semiconductor device includes a driver circuit portion including a driver circuit and a pixel portion including a pixel. The pixel includes a gate electrode layer having a light-transmitting property, a gate insulating layer, a source electrode layer and a drain electrode layer each having a light-transmitting property provided over the gate insulating layer, an oxide semiconductor layer covering top surfaces and side surfaces of the source electrode layer and the drain electrode layer and provided over the gate electrode layer with the gate insulating layer therebetween, a conductive layer provided over part of the oxide semiconductor layer and having a lower resistance than the source electrode layer and the drain electrode layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer.

公开(公告)号：US11652174B2

公开(公告)日：2023-05-16

申请号：US17886643

申请日：2022-08-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hajime Kimura ,  Kengo Akimoto ,  Masashi Tsubuku ,  Toshinari Sasaki

IPC: H01L29/786 ,  G09G3/36 ,  H01L27/12

CPC classification number: H01L29/78693 ,  G09G3/3648 ,  H01L27/1225 ,  H01L29/78618 ,  G09G2300/0842

Abstract: A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.

公开(公告)号：US11430899B2

公开(公告)日：2022-08-30

申请号：US17373879

申请日：2021-07-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hajime Kimura ,  Kengo Akimoto ,  Masashi Tsubuku ,  Toshinari Sasaki

IPC: H01L29/786 ,  G09G3/36 ,  H01L27/12

Abstract: A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.

公开(公告)号：US11296121B2

公开(公告)日：2022-04-05

申请号：US16233358

申请日：2018-12-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Akiharu Miyanaga ,  Kengo Akimoto ,  Kojiro Shiraishi

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/24 ,  H01L29/66 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  G09G3/36 ,  H01L27/32

Abstract: An embodiment is to include an inverted staggered (bottom gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.

公开(公告)号：US10916663B2

公开(公告)日：2021-02-09

申请号：US16021490

申请日：2018-06-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Masashi Tsubuku ,  Kengo Akimoto ,  Hiroki Ohara ,  Tatsuya Honda ,  Takatsugu Omata ,  Yusuke Nonaka ,  Masahiro Takahashi ,  Akiharu Miyanaga

IPC: H01L29/786 ,  H01L29/04 ,  H01L29/10 ,  H01L29/24

Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm−1 and less than or equal to 0.7 nm−1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm−1 and less than or equal to 4.1 nm−1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm−1 and less than or equal to 1.4 nm−1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm−1 and less than or equal to 7.1 nm−1.

公开(公告)号：US10593811B2

公开(公告)日：2020-03-17

申请号：US16372930

申请日：2019-04-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Kengo Akimoto

IPC: H01L29/786 ,  H01L29/49 ,  H01L21/02 ,  H01L29/66 ,  H01L29/24

Abstract: An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.

公开(公告)号：US10528079B2

公开(公告)日：2020-01-07

申请号：US15685045

申请日：2017-08-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kengo Akimoto

IPC: G06F1/16 ,  G06F3/01 ,  G06F3/041 ,  G06F3/0484 ,  G09G3/20 ,  G09G5/38 ,  G06F21/10 ,  G07F9/02 ,  G07G1/01 ,  G06F3/044 ,  G06F21/60 ,  G06Q20/40

Abstract: A novel display device and the like are provided. The data processing device includes a display panel, a means to obtain locational data, an arithmetic device, an angular sensor, a first housing, a second housing, and a hinge connected the first and second housings. The display panel is flexible, and is held in the inside of the first and second housings. The arithmetic device has a function of generating first image data based on locational data. The angular sensor supplies data of the folding angle between the housings to the arithmetic device. The arithmetic device has a function of generating second image data based on the locational data and the angular data. The second image data includes a second image and display coordinates of the second image. The display panel has a function of displaying an image based on the first image data and the second image data.

公开(公告)号：US10411102B2

公开(公告)日：2019-09-10

申请号：US15841891

申请日：2017-12-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Kengo Akimoto ,  Daisuke Kawae

IPC: H01L21/02 ,  H01L27/12 ,  H01L29/417 ,  H01L29/49 ,  H01L29/786 ,  H01L51/05 ,  H01L51/10

Abstract: A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle θ1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle θ2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.

公开(公告)号：US10236303B2

公开(公告)日：2019-03-19

申请号：US14290216

申请日：2014-05-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Kengo Akimoto ,  Shigeki Komori ,  Hideki Uochi ,  Tomoya Futamura ,  Takahiro Kasahara

IPC: H01L29/786 ,  H01L27/12 ,  G02F1/1368 ,  H01L29/66 ,  G02F1/1362

Abstract: A protective circuit includes a non-linear element, which includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and second wiring layers whose end portions overlap with the gate electrode over the gate insulating layer and in which a second oxide semiconductor layer and a conductive layer are stacked, and a first oxide semiconductor layer which overlaps with at least the gate electrode and which is in contact with the gate insulating layer, side face portions and part of top face portions of the conductive layer and side face portions of the second oxide semiconductor layer in the first wiring layer and the second wiring layer. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be decreased and the characteristics of the non-linear element can be improved.