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公开(公告)号：US20130244375A1
公开(公告)日：2013-09-19
申请号：US13888492
申请日：2013-05-07
IPC分类号： H01L29/66
CPC分类号： H01L29/66742 , H01L29/78621 , H01L29/7869
摘要： An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. A metal oxide layer having higher carrier concentration than the semiconductor layer is provided intentionally as the buffer layer between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
摘要翻译： 一个实施例是包括交错（顶栅结构）薄膜晶体管，其中使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且缓冲层设置在半导体层与源极和漏极之间 层。 有意地提供具有比半导体层更高的载流子浓度的金属氧化物层作为源极和漏极电极层与半导体层之间的缓冲层，从而形成欧姆接触。
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公开(公告)号：US12068329B2
公开(公告)日：2024-08-20
申请号：US17560479
申请日：2021-12-23
IPC分类号： H01L27/12 , H01L29/24 , H01L29/66 , H01L29/786 , G02F1/1333 , G02F1/1335 , G02F1/1343 , G02F1/1362 , G02F1/1368 , G09G3/36 , H10K59/121
CPC分类号： H01L27/1225 , H01L29/247 , H01L29/66969 , H01L29/78618 , H01L29/78648 , H01L29/7869 , H01L29/78693 , H01L29/78696 , G02F1/133345 , G02F1/133528 , G02F1/134336 , G02F1/13439 , G02F1/136286 , G02F1/1368 , G02F2201/123 , G09G3/3674 , G09G2310/0286 , H10K59/1213
摘要： An embodiment is to include an inverted staggered (bottom gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
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公开(公告)号：US09917197B2
公开(公告)日：2018-03-13
申请号：US15219764
申请日：2016-07-26
IPC分类号： H01L29/10 , H01L29/786 , H01L27/12 , H01L29/24 , H01L21/764
CPC分类号： H01L29/78606 , H01L21/764 , H01L27/1225 , H01L27/1288 , H01L29/24 , H01L29/7869 , H01L29/78696
摘要： An object is to provide a method for manufacturing a semiconductor device without exposing a specific layer to moisture or the like at all. A thin film element is manufactured in such a manner that a first film, a second film, and a third film are stacked in this order; a resist mask is formed over the third film; a mask layer is formed by etching the third film with the use of the resist mask; the resist mask is removed; a second layer and a first layer are formed by performing dry etching on the second film and the first film with the use of the mask layer; a fourth film is formed to cover at least the second layer and the first layer; and sidewall layers are formed to cover at least the entire side surfaces of the first layer by performing etch back on the fourth film.
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公开(公告)号：US09276124B2
公开(公告)日：2016-03-01
申请号：US14168293
申请日：2014-01-30
IPC分类号： H01L29/786 , H01L27/12 , H01L29/417
CPC分类号： H01L29/7869 , H01L27/1225 , H01L27/1288 , H01L29/41733
摘要： Provided is a method for manufacturing a semiconductor device so as not expose a semiconductor layer to moisture and the number of masks is reduced. For example, a first conductive film, a first insulating film, a semiconductor film, a second conductive film, and a mask film are formed. The first mask film is processed to form a first mask layer. Dry etching is performed on the first insulating film, the semiconductor film, and the second conductive film with the use of the first mask layer to form a thin film stack body, so that a surface of the first conductive film is at least exposed. Sidewall insulating layers covering side surfaces of the thin film stack body are formed. The first conductive film is side-etched to form a first electrode. A second electrode layer is formed with the second mask layer.
摘要翻译： 提供一种制造半导体器件的方法，以使半导体层不暴露于湿气，并且掩模的数量减少。 例如，形成第一导电膜，第一绝缘膜，半导体膜，第二导电膜和掩模膜。 处理第一掩模膜以形成第一掩模层。 使用第一掩模层对第一绝缘膜，半导体膜和第二导电膜进行干蚀刻，以形成薄膜堆叠体，使得第一导电膜的表面至少露出。 形成覆盖薄膜叠层体的侧面的侧壁绝缘层。 第一导电膜被侧蚀刻以形成第一电极。 第二电极层与第二掩模层形成。
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公开(公告)号：US09105659B2
公开(公告)日：2015-08-11
申请号：US14334016
申请日：2014-07-17
IPC分类号： H01L29/15 , H01L29/22 , H01L29/66 , H01L29/786
CPC分类号： H01L29/66772 , H01L29/6675 , H01L29/78618 , H01L29/7869
摘要： An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
摘要翻译： 一个实施例是包括交错（顶栅结构）薄膜晶体管，其中使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且缓冲层设置在半导体层与源极和漏极之间 层。 有意地在源极和漏极电极层与半导体层之间提供具有比半导体层高的载流子浓度的缓冲层，从而形成欧姆接触。
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公开(公告)号：US12074210B2
公开(公告)日：2024-08-27
申请号：US17111838
申请日：2020-12-04
IPC分类号： H01L29/66 , H01L21/46 , H01L27/12 , H01L29/786
CPC分类号： H01L29/66969 , H01L21/46 , H01L27/1225 , H01L29/7869
摘要： It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.
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公开(公告)号：US11296121B2
公开(公告)日：2022-04-05
申请号：US16233358
申请日：2018-12-27
IPC分类号： H01L27/12 , H01L29/786 , H01L29/24 , H01L29/66 , G02F1/1333 , G02F1/1335 , G02F1/1343 , G02F1/1362 , G02F1/1368 , G09G3/36 , H01L27/32
摘要： An embodiment is to include an inverted staggered (bottom gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
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公开(公告)号：US12034064B2
公开(公告)日：2024-07-09
申请号：US17111838
申请日：2020-12-04
IPC分类号： H01L29/66 , H01L21/46 , H01L27/12 , H01L29/786
CPC分类号： H01L29/66969 , H01L21/46 , H01L27/1225 , H01L29/7869
摘要： It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.
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公开(公告)号：US10930792B2
公开(公告)日：2021-02-23
申请号：US16783577
申请日：2020-02-06
IPC分类号： H01L29/786 , H01L29/423 , H01L29/66 , H01L27/12
摘要： To offer a semiconductor device including a thin film transistor having excellent characteristics and high reliability and a method for manufacturing the semiconductor device without variation. The summary is to include an inverted-staggered (bottom-gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used for a semiconductor layer and a buffer layer is provided between the semiconductor layer and source and drain electrode layers. An ohmic contact is formed by intentionally providing a buffer layer containing In, Ga, and Zn and having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrode layers.
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公开(公告)号：US10559695B2
公开(公告)日：2020-02-11
申请号：US15584264
申请日：2017-05-02
IPC分类号： H01L29/786 , H01L29/423 , H01L29/66 , H01L27/12
摘要： To offer a semiconductor device including a thin film transistor having excellent characteristics and high reliability and a method for manufacturing the semiconductor device without variation. The summary is to include an inverted-staggered (bottom-gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used for a semiconductor layer and a buffer layer is provided between the semiconductor layer and source and drain electrode layers. An ohmic contact is formed by intentionally providing a buffer layer containing In, Ga, and Zn and having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrode layers.
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