公开(公告)号：US20080017946A1

公开(公告)日：2008-01-24

申请号：US11880253

申请日：2007-07-20

Applicant: Yvon Cazaux ,  Philippe Coronel ,  Claire Fenouillet-Beranger ,  Francois Roy

Inventor： Yvon Cazaux ,  Philippe Coronel ,  Claire Fenouillet-Beranger ,  Francois Roy

IPC: H01L31/00 ,  H01L21/00

CPC classification number: H01L27/14634 ,  H01L27/14632 ,  H01L27/1464 ,  H01L27/14687

Abstract: An image sensor including photosensitive cells including photodiodes and at least one additional circuit with a significant heat dissipation including transistors. The image sensor is made in monolithic form and includes a layer of a semiconductor material having first and second opposite surfaces and including, on the first surface side, first regions corresponding to the power terminals of the transistors, the lighting of the image sensor being intended to be performed on the second surface side; a stack of insulating layers covering the first surface; a thermally conductive reinforcement covering the stack on the side opposite to the layer; and thermally conductive vias connecting the layer to the reinforcement.

Abstract translation: 包括包括光电二极管的感光单元和至少一个包括晶体管的显着散热的附加电路的图像传感器。 图像传感器制成单片形式并且包括具有第一和第二相对表面的半导体材料层，并且在第一表面侧包括对应于晶体管的电源端子的第一区域，图像传感器的点亮 在第二表面侧进行; 覆盖第一表面的一叠绝缘层; 导热性增强材料，覆盖层与该层相反的一侧; 以及将层连接到加强件的导热通孔。

公开(公告)号：US07321138B2

公开(公告)日：2008-01-22

申请号：US10398419

申请日：2001-10-12

Applicant: Gérard Ducreux

Inventor： Gérard Ducreux

IPC: H01L29/861

CPC classification number: H01L29/8611 ,  H01L29/8618

Abstract: The invention concerns an asymmetric diac comprising a highly-doped substrate (21) of a first type of conductivity, a lightly-doped epitaxial layer (22) of the second type of conductivity on the upper surface of the substrate (21), a highly-doped region (24) of the first type of conductivity on the side of the upper surface of the epitaxial layer, a region (23) of the second type of conductivity more doped than the epitaxial layer beneath the region (24) of the first type of conductivity and not overlapping relative thereto, a channel retaining ring (25) of the second type of conductivity more doped than the epitaxial layer, outside the first region, and a wall (26) of the first type of conductivity outside said ring, joining the substrate.

Abstract translation: 本发明涉及一种不对称二次电池，其包括第一类导电性的高掺杂衬底（21），在衬底（21）的上表面上的第二类导电性的轻掺杂外延层（22），高度 在外延层的上表面侧的第一类型导电性的掺杂区域（24），比第一类型导电性区域（24）下方的外延层更加掺杂的第二类型导电性的区域（23） 导电类型并且不相对于其重叠，具有比外延层更多掺杂的第二类型导电体的沟道保持环（25），在第一区域外部，以及在所述环外部的第一类型导电体的壁（26） 连接基板。

公开(公告)号：US07319754B2

公开(公告)日：2008-01-15

申请号：US10606600

申请日：2003-06-26

Applicant: Guillaume Petitjean

Inventor： Guillaume Petitjean

IPC: H04K1/00

CPC classification number: G06T1/0085 ,  G06T2201/0053 ,  H04N19/139 ,  H04N19/159 ,  H04N19/176 ,  H04N19/467 ,  H04N19/61

Abstract: A method and a circuit for marking with a binary code a video sequence compressed by motion calculation, from one picture to another, of macroblocks dividing each picture, the digital pictures being distributed in at least two categories according to whether they are coded integrally or by the motion vectors of the macroblocks with respect to the previous picture or to the previous and next pictures, which includes, at least for the pictures coded by motion vectors, only marking the macroblocks for which the motion vectors are greater than a predetermined threshold.

Abstract translation: 一种二进制编码方法和电路，用于通过运动计算压缩的视频序列，从一个图像到另一个用于划分每个图像的宏块，所述数字图像根据它们是整体编码还是由 宏块相对于先前图像或上一个和下一个图像的运动矢量，其至少包括对运动矢量编码的图像，仅标记运动矢量大于预定阈值的宏块。

公开(公告)号：US07315634B2

公开(公告)日：2008-01-01

申请号：US10234754

申请日：2002-09-04

Applicant: Lionel Martin

Inventor： Lionel Martin

IPC: G06K9/00

CPC classification number: G06K9/00093

Abstract: A method and a system for comparing a set of minutiae of a current image with a set of minutiae of a reference image, according to which the minutiae are sorted by their Cartesian coordinates in the image plane from a predetermined point of origin, a common path of similar minutiae is searched in the reference set and in the current set, and it is considered that there is an identity between the two images if the common path is comprised of a number of segments greater than a first threshold.

Abstract translation: 一种用于将当前图像的细节集合与参考图像的细节集合进行比较的方法和系统，根据该方法和系统，从预定原点在图像平面中通过其笛卡尔坐标对细节进行分类，公共路径 在参考集合和当前集合中搜索类似细节，并且如果公共路径由大于第一阈值的段数组成，则认为在两个图像之间存在一个身份。

公开(公告)号：US07313646B2

公开(公告)日：2007-12-25

申请号：US11138885

申请日：2005-05-26

Applicant: Hervé Chalopin ,  Laurent Tabaries

Inventor： Hervé Chalopin ,  Laurent Tabaries

IPC: G06F12/00 ,  G06F9/30 ,  G06F15/00 ,  G06F15/76

CPC classification number: G06F13/385

Abstract: An electronic system comprises an initiator module and a target module addressable by the initiator module, and an interface and control module for interfacing between respective communication protocols of the initiator module and of the target module. The interface and control module is constructed to set a composite instruction detection signal in response to the detection of a composite instruction executed by the initiator module, which composite instruction detection signal is used for the interfacing. The interface and control module is constructed to detect a composite instruction executed by the initiator module when, at a determined clock cycle of the initiator module, a change of the elementary operation executed by the initiator module is detected with respect to the previous clock cycle of the initiator module, while, at the same time, a signal for selecting the target module which was active is kept active.

Abstract translation: 电子系统包括发起者模块和可由发起者模块寻址的目标模块，以及用于在发起者模块和目标模块的相应通信协议之间进行接口的接口和控制模块。 接口和控制模块被构造成响应于由发起者模块执行的复合指令的检测来设置复合指令检测信号，该组合指令检测信号用于接口。 所述接口和控制模块被构造为检测由所述发起者模块执行的复合指令，所述复合指令在所述发起者模块的所确定的时钟周期，相对于所述发起者模块的先前时钟周期检测到所述发起者模块执行的基本操作的改变， 同时，启动模块同时保持活动的选择目标模块的信号。

公开(公告)号：US20070288691A1

公开(公告)日：2007-12-13

申请号：US11729308

申请日：2007-03-27

Applicant: Patrice Couvert ,  Xavier Cauchy ,  Anthony Philippe ,  Sebastien Ferroussat

Inventor： Patrice Couvert ,  Xavier Cauchy ,  Anthony Philippe ,  Sebastien Ferroussat

IPC: G06F12/00

CPC classification number: G06F13/28

Abstract: Data stored in a first memory are processed by a processing device comprising a processor, a second memory, and an interface device interfacing the processing device with the first memory. In the interface device, in order to facilitate transfer of data from the first memory where data are stored in a first data format to the second memory where data are stored in a second data format, a first group of data is received from the first memory, with said group ordered into a sequence corresponding to the first data format. Then at least one second group of data is obtained by ordering said data in the first group into a new sequence which is a function of the first and second data formats. The second group of data is stored in the second memory.

Abstract translation: 存储在第一存储器中的数据由包括处理器，第二存储器和将处理设备与第一存储器连接的接口设备的处理设备处理。 在接口装置中，为了促进将数据以第一数据格式存储的第一存储器的数据传送到以第二数据格式存储数据的第二存储器，从第一存储器接收第一组数据 ，所述组被排序成对应于第一数据格式的序列。 然后通过将第一组中的所述数据排序成作为第一和第二数据格式的函数的新序列来获得至少一个第二组数据。 第二组数据存储在第二个存储器中。

公开(公告)号：US20070279147A1

公开(公告)日：2007-12-06

申请号：US11807507

申请日：2007-05-29

Applicant: Francois Dupont ,  Hilal Ezzeddine

Inventor： Francois Dupont ,  Hilal Ezzeddine

IPC: H01P5/18

CPC classification number: H01P5/186

Abstract: A directional coupler having a first structure with distributed lines having a first conductive line intended to convey a main signal between two end terminals and having a second conductive line, coupled to the first one, intended to convey a secondary signal proportional to the main signal; and a second structure with local elements including, between a first terminal of the coupler intended to extract the secondary signal and a first end of the second line, two attenuators in series between which is interposed a low-pass filter and, between a second terminal of the coupler and the second end of the second line, at least one attenuator.

Abstract translation: 一种具有第一结构的定向耦合器，分布线具有第一导电线，用于在两个端子之间输送主信号，并且具有耦合到第一导线的第二导线，用于传送与主信号成比例的次级信号; 以及具有局部元件的第二结构，包括在要提取次级信号的耦合器的第一端子和第二线路的第一端之间的串联的两个衰减器，其间插入有低通滤波器，并且在第二端子之间 的耦合器和第二线的第二端，至少一个衰减器。

公开(公告)号：US20070279083A1

公开(公告)日：2007-12-06

申请号：US11787192

申请日：2007-04-12

Applicant: Thierry Padilla ,  Mikael Rien

Inventor： Thierry Padilla ,  Mikael Rien

IPC: H03K19/003

CPC classification number: H03K19/018528 ,  H03K19/00361 ,  H03K19/018585 ,  H04L25/0264 ,  H04L25/028

Abstract: A buffer circuit for transmission of logical signals includes a first buffer and second buffer. The first buffer supplies logical signals to the output buffer which is connected in series with the first buffer to produce output logical signals. A slope of the logical signals produced at the output of the output buffer is controlled in order to adapt the signal transmission speed. The first buffer and output buffer preferably are logic gates (such as inverters) made using the CML technology. The slope of the output signal is controlled using a slope control module which applies a logical signal which programs a resistance value of a pair of variable output resistances of the CML logic gate which forms the first buffer.

Abstract translation: 用于发送逻辑信号的缓冲电路包括第一缓冲器和第二缓冲器。 第一缓冲器将逻辑信号提供给与第一缓冲器串联连接的输出缓冲器，以产生输出逻辑信号。 控制在输出缓冲器的输出处产生的逻辑信号的斜率，以适应信号传输速度。 第一个缓冲器和输出缓冲器最好是使用CML技术制成的逻辑门（如反相器）。 使用斜率控制模块来控制输出信号的斜率，该斜率控制模块应用编程形成第一缓冲器的CML逻辑门对的一对可变输出电阻的电阻值的逻辑信号。

公开(公告)号：US20070275536A1

公开(公告)日：2007-11-29

申请号：US11746177

申请日：2007-05-09

Applicant: Sebastien Cremer ,  Cedric Perrot ,  Claire Richard

Inventor： Sebastien Cremer ,  Cedric Perrot ,  Claire Richard

IPC: H01L21/20

CPC classification number: H01L28/91 ,  H01L27/10829

Abstract: A method for forming a MIM-type capacitor by filling of trenches by conformal depositions of insulating materials and of conductive materials, two successive electrodes of the capacitor including on either side of a thin vertical insulating layer at least one conductive layer of same nature, including the step of lowering the level of the conductive layers with respect to the level of the insulating layer separating them.

Abstract translation: 一种用于通过绝缘材料和导电材料的共形沉积填充沟槽来形成MIM型电容器的方法，所述电容器的两个连续电极包括在薄垂直绝缘层的至少一个相同性质的导电层的任一侧上，包括 相对于分离它们的绝缘层的水平降低导电层的水平的步骤。

公开(公告)号：US20070262815A1

公开(公告)日：2007-11-15

申请号：US11716536

申请日：2007-03-09

Applicant: Olivier Giraud ,  Roger Petigny ,  Philippe Marguery

Inventor： Olivier Giraud ,  Roger Petigny ,  Philippe Marguery

IPC: H03F3/38 ,  H03F3/217

CPC classification number: H03K7/08 ,  H03F3/2173

Abstract: A generator capable of supplying one or more output signals with a modulated cyclic ratio includes one or more formatting circuits each processing one input signal and one or more class D amplifiers powered with a power supply voltage and being driven by a corresponding one of the formatting circuits. Each formatting circuit has a counter-reaction loop and uses a reference voltage for which the average value is equal to half the power supply voltage. The corresponding output signal is thus corrected for any variations in the power supply voltage.

Abstract translation: 能够提供具有调制循环比率的一个或多个输出信号的发生器包括一个或多个格式化电路，每个格式化电路处理一个输入信号，以及一个或多个D类放大器，其由电源电压供电，并由对应的一个格式化电路驱动 。 每个格式化电路都具有反作用回路，并使用平均值等于电源电压一半的参考电压。 因此，对于电源电压的任何变化，相应的输出信号被校正。