Abstract:
An integrated microchannel reactor and heat exchanger comprising: (a) a waveform sandwiched between opposing shim sheets and mounted to the shim sheets to form a series of microchannels, where each microchannel includes a pair of substantially straight side walls, and a top wall formed by at least one of the opposing shim sheets, and (b) a first set of microchannels in thermal communication with the waveform, where the waveform has an aspect ratio greater than two.
Abstract:
A device includes a gate stack formed over a channel in a semiconductor substrate. The gate stack includes a layer of gate insulator material, a layer of gate metal overlying the layer of gate insulator material, and a layer of contact metal overlying the layer band edge gate metal. The device further includes source and drain contacts adjacent to the channel. The source and drain contacts each include a layer of the gate metal that overlies and is in direct electrical contact with a doped region of the semiconductor substrate, and a layer of contact metal that overlies the layer of gate metal.
Abstract:
An electronic device having a cable holding device is disclosed. The electronic device comprises a case; a circuit board in the case; a cable holding device attached to the circuit board and defining a through hole, a first positioning slot and a second positioning slot; the first positioning slot communicating with the through hole, and the second positioning slot communicating with the through hole; a cable electronically connected to the circuit board; wherein the cable is received either in the first positioning slot and the through hole or in the second positioning slot and the through hole.
Abstract:
Provided is a process and device for exchanging heat energy between three or more streams in a microchannel heat exchanger which can be integrated with a microchannel reactor to form an integrated microchannel processing unit. The combining of a plurality of integrated microchannel devices to provide the benefits of large-scale operation is enabled. In particular, the microchannel heat exchanger enables flexible heat transfer between multiple streams and total heat transfer rates of about 1 Watt or more per core unit volume expressed as W/cc.
Abstract:
Exemplary embodiments provide various techniques and systems for identifying data objects stored on clustered logical data containers. In one embodiment, a method is provided for creating a backward data object handle. In this method, a request to create a file is received, and a redirector file is created on a first logical data container based on receipt of the request. A redirector handle resulting from the creation of the redirector file is received. A data object of the file is then created on a second logical data container using the redirector handle as an identifier of the data object. This redirector handle included in the identifier then becomes a backward data object handle that points from the data object to the redirector file. As such, the redirector file can be identified by referencing the identifier of the data object.
Abstract:
An MOSFET device having a Silicide layer of uniform thickness, and methods for its fabrication, are provided. One such method involves depositing a metal layer over wide and narrow contact trenches on the surface of a silicon semiconductor substrate. Upon formation of a uniformly thin amorphous intermixed alloy layer at the metal/silicon interface, the excess (unreacted) metal is removed. The device is annealed to facilitate the formation of a thin silicide layer on the substrate surface which exhibits uniform thickness at the bottoms of both wide and narrow contact trenches.
Abstract:
The application provides a method for partitioning a watermark image with western language characters, comprising: partitioning a western language characters image along rows and columns to form a plurality of character image blocks; identifying valid character image blocks from the formed character image blocks; counting sizes of the valid character image blocks to determine if the image corresponds to a document with a large font size or a document with a small font size; dividing words in the image into a plurality of groups, wherein each divided group in the document with large font size has different numbers of words from that with small font size; and dividing equally the divided word groups into multiple portions corresponding to watermark image blocks. The application further provides a device for partitioning a watermark image with western language characters. The operability of watermark embedding process can be ensured through the above technical solution.
Abstract:
A semiconductor is formed on an SOI substrate, such as an extremely thin SOI (ETSOI) substrate, with increased extension thickness. Embodiments include semiconductor devices having an epitaxially formed silicon-containing layer, such as embedded silicon germanium (eSiGe), on the SOI substrate. An embodiment includes forming an SOI substrate, epitaxially forming a silicon-containing layer on the SOI substrate, and forming a gate electrode on the epitaxially formed silicon-containing layer. After gate spacers and source/drain regions are formed, the gate electrode and underlying silicon-containing layer are removed and replaced with a high-k metal gate. The use of an epitaxially formed silicon-containing layer reduces SOI thickness loss due to fabrication process erosion, thereby increasing extension thickness and lowering extension resistance.
Abstract:
A method of forming a metal semiconductor alloy that includes forming an intermixed metal semiconductor region to a first depth of a semiconductor substrate without thermal diffusion. The intermixed metal semiconductor region is annealed to form a textured metal semiconductor alloy. A second metal layer is formed on the textured metal semiconductor alloy. The second metal layer on the textured metal semiconductor alloy is then annealed to form a metal semiconductor alloy contact, in which metal elements from the second metal layer are diffused through the textured metal semiconductor alloy to provide a templated metal semiconductor alloy. The templated metal semiconductor alloy includes a grain size that is greater than 2× for the metal semiconductor alloy, which has a thickness ranging from 15 nm to 50 nm.
Abstract:
An exemplary calibration apparatus includes a detecting circuit and a calibrating circuit. The detecting circuit is arranged for generating a detection result by detecting relationship between edges of a plurality of signals generated from a plurality of signal sources, wherein at least one of the edges is a falling edge. The calibrating circuit is coupled to the detecting circuit, and arranged for calibrating at least one of the signal sources according to the detection result. An exemplary calibration method includes the following steps: generating a detection result by detecting relationship between edges of a plurality of signals generated from a plurality of signal sources, wherein at least one of the edges is a falling edge; and calibrating at least one of the signal sources according to the detection result.