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公开(公告)号：US20210193190A1
公开(公告)日：2021-06-24
申请号：US17135138
申请日：2020-12-28
Applicant: Rambus Inc.
Inventor： Thomas Vogelsang
IPC: G11C5/06 , H01L23/48 , H01L27/108 , H01L25/065 , G11C5/02
Abstract: A memory device includes a first dynamic random access memory (DRAM) integrated circuit (IC) chip including first memory core circuitry, and first input/output (I/O) circuitry. A second DRAM IC chip is stacked vertically with the first DRAM IC chip. The second DRAM IC chip includes second memory core circuitry, and second I/O circuitry. Solely one of the first DRAM IC chip or the second DRAM IC chip includes a conductive path that electrically couples at least one of the first memory core circuitry or the second memory core circuitry to solely one of the first I/O circuitry or the second I/O circuitry, respectively.
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公开(公告)号：US11032495B1
公开(公告)日：2021-06-08
申请号：US16356265
申请日：2019-03-18
Applicant: Rambus Inc.
Inventor： Thomas Vogelsang
IPC: H04N5/353 , H04N5/378 , H04N5/355 , H04N5/3745 , H04N5/335
Abstract: An image sensor generates first digital samples and second digital samples during respective first and second sampling intervals, the first digital samples including at least one digital sample of each pixel of a first plurality of pixels, and the second digital samples including at least one digital sample of each pixel of a second plurality of pixels. A sum of the first digital samples is accumulated within a first counter as the first sampling interval transpires, and a sum of the second digital samples is accumulated within the first counter as the second sampling interval transpires.
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公开(公告)号：US20200168288A1
公开(公告)日：2020-05-28
申请号：US16690743
申请日：2019-11-21
Applicant: Rambus Inc.
Inventor： Ely Tsern , Frederick A Ware , Suresh Rajan , Thomas Vogelsang
Abstract: A method of operation in an integrated circuit (IC) memory device is disclosed. The method includes refreshing a first group of storage rows in the IC memory device at a first refresh rate. A retention time for each of the rows is tested. The testing for a given row under test includes refreshing at a second refresh rate that is slower than the first refresh rate. The testing is interruptible based on an access request for data stored in the given row under test.
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公开(公告)号：US10652493B2
公开(公告)日：2020-05-12
申请号：US16197270
申请日：2018-11-20
Applicant: Rambus Inc.
Inventor： John Ladd , Michael Guidash , Craig M. Smith , Thomas Vogelsang , Jay Endsley , Michael T. Ching , James E. Harris
Abstract: A sequence of control voltage levels are applied to a control signal line capacitively coupled to a floating diffusion node of a pixel to sequentially adjust a voltage level of the floating diffusion node. A pixel output signal representative of the voltage level of the floating diffusion node is compared with a reference voltage to identify a first control voltage level of the sequence of control voltage levels for which the voltage level of the floating diffusion node exceeds the reference voltage.
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公开(公告)号：US10652435B2
公开(公告)日：2020-05-12
申请号：US15714483
申请日：2017-09-25
Applicant: Rambus Inc.
Inventor： Patrick R. Gill , Thomas Vogelsang
Abstract: An imaging system with a diffractive optic captures an interference pattern responsive to light from an imaged scene to represent the scene in a spatial-frequency domain. The sampled frequency-domain image data has properties that are determined by the point-spread function of diffractive optic and characteristics of scene. An integrated processor can modified the sampled frequency-domain image data responsive to such properties before transforming the modified frequently-domain image data into the pixel domain.
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Patent Agency Ranking
公开(公告)号：US10594973B2
公开(公告)日：2020-03-17
申请号：US15497093
申请日：2017-04-25
Applicant: Rambus Inc.
Inventor： Thomas Vogelsang , Michael Guidash , Song Xue , James E. Harris
Abstract: An image sensor architecture with multi-bit sampling is implemented within an image sensor system. A pixel signal produced in response to light incident upon a photosensitive element is converted to a multiple-bit digital value representative of the pixel signal. If the pixel signal exceeds a sampling threshold, the photosensitive element is reset. During an image capture period, digital values associated with pixel signals that exceed a sampling threshold are accumulated into image data.
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公开(公告)号：US20190294378A1
公开(公告)日：2019-09-26
申请号：US16371345
申请日：2019-04-01
Applicant: Rambus Inc.
Inventor： Frederick A. Ware , Thomas Vogelsang
Abstract: An memory component includes a memory bank and a command interface to receive a read-modify-write command, having an associated read address indicating a location in the memory bank and to either access read data from the location in the memory bank indicated by the read address after an adjustable delay period transpires from a time at which the read-modify-write command was received or to overlap multiple read-modify-write commands. The memory component further includes a data interface to receive write data associated with the read-modify-write command and an error correction circuit to merge the received write data with the read data to form a merged data and write the merged data to the location in the memory bank indicated by the read address.
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公开(公告)号：US10356350B2
公开(公告)日：2019-07-16
申请号：US16051344
申请日：2018-07-31
Applicant: Rambus Inc.
Inventor： Michael Guidash , Jay Endsley , John Ladd , Thomas Vogelsang , Craig M. Smith
Abstract: Photocharge is accumulated within an image sensor pixel array during a first exposure interval. At conclusion of the first exposure interval, accumulated photocharge is discarded from a first subset of the pixels to emulate absence of incident light with respect to those pixels. After discarding accumulated photocharge from the first subset of the pixels, first and second readout signals are generated, the first readout signals corresponding to respective pixels not included in the first subset and indicative of photocharge accumulated therein, and the second readout signals corresponding to respective pixels included in the first subset.
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公开(公告)号：US10269411B2
公开(公告)日：2019-04-23
申请号：US14833028
申请日：2015-08-21
Applicant: Rambus Inc.
Inventor： Thomas Vogelsang , Brent Haukness , Stephen Charles Bowyer
IPC: G11C11/00 , G11C11/4096 , G06F12/00 , G06F13/16 , G11C11/408 , G11C11/4091
Abstract: Embodiments generally relate to a command protocol and/or related circuits and apparatus for communication between a memory device and a memory controller. In one embodiment, the memory controller includes an interface for transmitting commands to the memory device, wherein the memory device includes bitline multiplexers, and accessing of memory cells within the memory device is carried out by a command protocol sequence that includes a wordline selection, followed by bitline selections by the bitline multiplexers. In another embodiment, a memory device includes bitline multiplexers and further includes an interface for receiving a command protocol sequence that specifies a wordline selection followed by bitline selections by the bitline multiplexers.
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公开(公告)号：US10249660B2
公开(公告)日：2019-04-02
申请号：US14898054
申请日：2014-06-09
Applicant: Rambus Inc.
Inventor： Michael Guidash , Thomas Vogelsang
IPC: H01L27/146 , H04N5/347 , H04N5/3745 , H04N5/378
Abstract: In a pixel array within an integrated-circuit image sensor, a pixel (870) includes a photodetector (260) and floating diffusion (262) formed within a substrate. First (881) and second (883) gate elements are disposed adjacent one another over a region (885) of the substrate between the photodetector and the floating diffusion and coupled respectively to a row line (TGr) that extends in a row direction within the pixel array and a column line (TGc) that extends in a column direction within the pixel array.
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