公开(公告)号：US20220157651A1

公开(公告)日：2022-05-19

申请号：US17439300

申请日：2020-02-26

Applicant: Soitec

Inventor： Didier Landru ,  Oleg Kononchuk ,  Nadia Ben Mohamed

IPC: H01L21/762 ,  H01L21/265 ,  H01L21/78

Abstract: A method for transferring a useful layer to a carrier substrate, includes the following steps: a) providing a donor substrate including a buried weakened plane; b) providing a carrier substrate; c) joining the donor substrate, by its front face, to the carrier substrate along a bonding interface so as to form a bonded structure; d) annealing the bonded structure in order to apply a weakening thermal budget thereto and to bring the buried weakened plane to a defined level of weakening; and e) initiating a splitting wave in the weakened plane by applying a stress to the bonded structure, the splitting wave self-propagating along the weakened plane to result in the useful layer being transferred to the carrier substrate. The splitting wave is initiated when the bonded structure is subjected to a temperature between 150° C. and 250° C.

公开(公告)号：US11335847B2

公开(公告)日：2022-05-17

申请号：US16072587

申请日：2017-01-17

Applicant: Soitec

Inventor： Oleg Kononchuk ,  Eric Butaud ,  Eric Desbonnets

IPC: H01L41/312 ,  H01L41/08 ,  H03H9/02 ,  H03H9/00 ,  H03H3/02

Abstract: The disclosure relates to a hybrid structure for a surface-acoustic-wave device comprising a useful layer of piezoelectric material joined to a carrier substrate having a thermal expansion coefficient lower than that of the useful layer; the hybrid structure comprising an intermediate layer located between the useful layer and the carrier substrate, the intermediate layer being a structured layer formed from at least two different materials comprising a plurality of periodic motifs in the plane of the intermediate layer.

公开(公告)号：US11282889B2

公开(公告)日：2022-03-22

申请号：US16477499

申请日：2018-01-10

Applicant: Soitec

Inventor： Walter Schwarzenbach ,  Oleg Kononchuk ,  Ludovic Ecarnot ,  Christelle Michau

IPC: H01L27/146 ,  H01L21/762

Abstract: A substrate for a front-side type image sensor includes a supporting semiconductor substrate, an electrically insulating layer, and a silicon-germanium semiconductor layer, known as the active layer. The electrically insulating layer includes a stack of dielectric and metallic layers selected such that the reflectivity of the stack in a wavelength range of between 700 nm and 3 μm is greater than the reflectivity of a silicon oxide layer having a thickness equal to that of the stack. The substrate also comprises a silicon layer between the electrically insulating layer and the silicon-germanium active layer. The disclosure also relates to a method for the production of such a substrate.

公开(公告)号：US11276605B2

公开(公告)日：2022-03-15

申请号：US16473475

申请日：2018-01-10

Applicant: Soitec

Inventor： Oleg Kononchuk ,  Didier Landru ,  Nadia Ben Mohamed

IPC: H01L21/762 ,  H01L21/324

Abstract: A method of fabricating a semiconductor substrate includes the following activities: a) providing a donor substrate with a weakened zone inside the donor substrate, the weakened zone forming a border between a layer to be transferred and the rest of the donor substrate, b) attaching the donor substrate to a receiver substrate, the layer to be transferred being located at the interface between the donor substrate and the receiver substrate; c) detaching the receiver substrate along with the transferred layer from the rest of the donor substrate, at the weakened zone; and d) at least one step of smoothing the surface of the transferred layer, wherein the semiconductor substrate obtained from step c) is kept, at least from the moment of detachment until the end of the smoothing step, in a non-oxidizing inert atmosphere or in a mixture of non-oxidizing inert gases. Semiconductor substrates are fabricated using such a method.

公开(公告)号：US20220076992A1

公开(公告)日：2022-03-10

申请号：US17417715

申请日：2019-12-23

Applicant: Soitec

Inventor： Yvan Morandini ,  Walter Schwarzenbach ,  Frédéric Allibert ,  Eric Desbonnets ,  Bich-Yen Nguyen

IPC: H01L21/762 ,  H01L21/02 ,  H01L21/322 ,  H01L27/12 ,  H01L29/06

Abstract: A semiconductor-on-insulator multilayer structure, comprises: —a stack, called the back stack, of the following layers from a back side to a front side of the structure: a semiconductor carrier substrate the electrical resistivity of which is between 500 Ω·cm and 30 kΩ·cm, a first electrically insulating layer, a first semiconductor layer, —at least one trench isolation that extends through the back stack at least down to the first electrically insulating layer), and that electrically isolates two adjacent regions of the multilayer structure, the multilayer structure being characterized in that it further comprises at least one FD-SOI first region, and at least one RF-SOI second region.

公开(公告)号：US11251321B2

公开(公告)日：2022-02-15

申请号：US16074342

申请日：2017-01-27

Applicant: Soitec ,  Commissariat A L'Energie Atomique et aux Energies Alternatives

Inventor： Eric Guiot ,  Aurelie Tauzin ,  Thomas Signamarcheix ,  Emmanuelle Lagoutte

IPC: H01L31/043 ,  H01L31/18 ,  H01L31/0725 ,  H01L31/054 ,  H01L21/18 ,  H01L31/0735

Abstract: An engineered substrate comprising: a seed layer made of a first semiconductor material for growth of a solar cell; a first bonding layer on the seed layer; a support substrate made of a second semiconductor material; a second bonding layer on a first side of the support substrate; a bonding interface between the first and second bonding layers; the first and second bonding layers each made of metallic material; wherein doping concentration and thickness of the engineered substrate, in particular, of the seed layer, the support substrate, and both the first and second bonding layers, are selected such that the absorption of the seed layer is less than 20%, preferably less than 10%, as well as total area-normalized series resistance of the engineered substrate is less than 10 mOhm·cm2, preferably less than 5 mOhm·cm2.

公开(公告)号：US11251265B2

公开(公告)日：2022-02-15

申请号：US16080279

申请日：2017-02-23

Applicant: Centre National de la Recherche Scientifique ,  Universite Claude Bernard Lyon 1 ,  Soitec

Inventor： Christophe Figuet ,  Oleg Kononchuk ,  Kassam Alassaad ,  Gabriel Ferro ,  Véronique Souliere ,  Christelle Veytizou ,  Taguhi Yeghoyan

IPC: H01L29/06 ,  H01L21/02 ,  H01L21/762 ,  H01L29/16

Abstract: A support for a semiconductor structure includes a charge-trapping layer on a base substrate. The charge-trapping layer consists of a polycrystalline main layer and, interposed in the main layer or between the main layer and the base substrate, at least one intermediate polycrystalline layer composed of a silicon and carbon alloy or carbon. The intermediate layer has a resistivity greater than 1000 ohm·cm.

公开(公告)号：US11222824B2

公开(公告)日：2022-01-11

申请号：US16769976

申请日：2018-11-21

Applicant: Soitec

Inventor： Michel Bruel

IPC: H01L21/78 ,  H01L21/304

Abstract: A method for transferring a superficial layer from a detachable structure comprises the following steps: a) supplying the detachable structure comprising: •a support substrate, •a detachable layer arranged on the support substrate along a main plane and comprising a plurality of walls that are separated from one another, each wall having at least one side that is perpendicular to the main plane; •a superficial layer arranged on the detachable layer along the main plane; b) applying a mechanical force configured to cause said walls to bend, along a direction that is secant to said side, until causing the mechanical rupture of the walls, in order to detach the superficial layer from the support substrate.

公开(公告)号：US20210366763A1

公开(公告)日：2021-11-25

申请号：US17444230

申请日：2021-08-02

Applicant: Soitec

Inventor： Walter Schwarzenbach ,  Oleg Kononchuk ,  Ludovic Ecarnot

IPC: H01L21/762 ,  H01L27/146 ,  H01L31/028 ,  H01L21/02 ,  H01L21/203

Abstract: A semiconductor on insulator type structure, which may be used for a front side type imager, successively comprises, from its rear side to its front side, a semiconductor support substrate, an electrically insulating layer and an active layer comprising a monocrystalline semiconductor material. The active layer is made of a semiconductor material having a state of mechanical stress with respect to the support substrate, and the support substrate comprises, on its rear side, a silicon oxide layer, the thickness of the oxide layer being chosen to compensate bow induced by the mechanical stress between the active layer and the support substrate during cooling of the structure after the formation by epitaxy of at least a part of the active layer on the support substrate.

公开(公告)号：US11159140B2

公开(公告)日：2021-10-26

申请号：US16313804

申请日：2017-06-26

Applicant: Soitec

Inventor： Gweltaz Gaudin ,  Isabelle Huyet

IPC: H03H9/02 ,  H01L41/08

Abstract: A hybrid structure for a surface acoustic wave device comprises a useful layer of piezoelectric material having a free first surface and a second surface disposed on a support substrate that has a lower coefficient of thermal expansion than that of the useful layer. The hybrid structure further comprises a trapping layer disposed between the useful layer and the support substrate, and at least one functional interface of predetermined roughness between the useful layer and the trapping layer.