Abstract:
In one aspect, there is disclosed a digital signal processor and method performed by the same for performing object detection, including facial detection, in a reduced number of clock cycles. The method comprises using Sobel edge detection to identify regions with many edges, and classifying those regions as foreground candidates. Foreground candidates are further checked for vertical or horizontal symmetry, and symmetrical windows are classified as face candidates. Viola-Jones type facial detection is then performed only on those windows identified as face candidates.
Abstract:
A digital-to-analog (DAC) element may include a plurality of switches arranged to form two circuit branches between a current source and a first and a second outputs. The first circuit branch may include two switches defining parallel current paths between the current source and the first output terminal. The second circuit branch may include two switches defining parallel current paths between the current source and the second output terminal. A control circuit, responsive to an input signal that selects one of the circuit branches, may provide control signals to close one of switches in the selected circuit branch in a first portion of a clock cycle and to close the other of the switches in the selected circuit branch in a second portion of the clock cycle.
Abstract:
A MEMS switch device including: a substrate layer; an insulating layer formed over the substrate layer; and a MEMS switch module having a plurality of contacts formed on the surface of the insulating layer, wherein the insulating layer includes a number of conductive pathways formed within the insulating layer, the conductive pathways being configured to interconnect selected contacts of the MEMS switch module.
Abstract:
A circuit may include a detector, a modulator, a switch, and a stabilizer. The detector may detect current supplied to an output of the circuit to generate an overcurrent signal. The modulator may modulate a pulse signal based upon the output of the circuit. The switch may control a power stage to generate the output of the circuit based upon the overcurrent signal and the pulse signal. The stabilizer may send an offset signal to the modulator. The stabilizer may generate the offset signal with a magnitude adjusted based upon the overcurrent signal, and the modulator may adjust the pulse signal based upon the offset signal.
Abstract:
A predetermined nonlinearity may be introduced between a digital predistorter and a power amplifier of a RF transmitter. The nonlinearity may be applied to an output of a digital predistorter. The application of the nonlinearity to the predistorter output may expand a bandwidth of the predistorter output from a first lower bandwidth to a higher second bandwidth of the power amplifier that may be needed to support a predetermined data transfer rate at the RF transmitter. Introducing this nonlinearity between the predistorter and the power amplifier may reduce the sampling rate and power requirements of components included as part of a predistortion device. As a result less noise may be generated and less power may be consumed, resulting in smaller, more efficient, and more accurate predistortion and/or RF transmission systems.
Abstract:
A calibration system for an analog-to-digital converter (ADC) an internal ADC that receives an analog input and converts the analog input to digital multi-bit data. The calibration system also includes a reference shuffling circuit that shuffles reference values of comparators of the internal ADC. Further, the calibration system includes a calibration circuit that calibrates the comparators of the internal ADC. The calibration system includes a digital block that measures an amplitude based on the digital multi-bit data. Additionally, the calibration system includes calibration logic that controls the calibration circuit based on an output of the digital block.
Abstract:
Apparatus and methods for estimating a direct current offset in an upconverter are disclosed. Samples of a first signal are received. Values of a compensation signal are retrieved. For example, the compensation signal can be a component in a modified baseband signal, wherein the modified baseband signal is upconverted, downconverted, and filtered to generate the first signal. An estimate of a first DC offset induced by an upconverter is generated based at least partly on at least two selected samples of the first signal and corresponding values of the compensation signal.
Abstract:
In a multi transmitter-receiver system, transmitter noise cancellation may be applied selectively for certain transmitters by exploiting asymmetries of the system. Hence, observation receiver(s) numbering less than the number of transmitters may be provided saving space and cost. Each observation receiver may selectively couple to a transmitter path and estimate the leakage noise from that transmitter. Based on the estimated leakage noise, noise cancellation may be applied to corresponding receiver path(s). Selection of the transmitters for leakage estimation may be based on system conditions at that time, which may be known to the system or may be estimated dynamically.
Abstract:
A power converter may include an amplifier that generates an error signal, a modulator that generates a modulated error signal, an isolator that generates an isolated modulated error signal, and a demodulator that generates an isolated error signal, which may be substantially proportional to the difference between the output signal and the reference signal, and a controller that controls a power stage to generate the output signal of the power converter.
Abstract:
Advanced TDM daisy-chain configurations utilize data transmission over a frame sync signal path with feedback to allow for communication between the master device and slave devices and/or between individual slave devices while maintaining a simple TDM communication interface. In certain daisy-chain configurations, the feedback path returns to the frame sync signal path between the master device and the first slave device, which allows for transmission of data from the last slave device to the master device and/or to the first slave device. In other daisy-chain configurations, the feedback path returns to the frame sync signal path between the first slave device and the second slave device, which allows for transmission of data from the last slave device to the first slave device (which may transfer data to the master device, e.g., over separate command and/or data lines) and/or to the first slave device.