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公开(公告)号：US20150171880A1
公开(公告)日：2015-06-18
申请号：US14571274
申请日：2014-12-15
Applicant: ANALOG DEVICES TECHNOLOGY
Inventor： Trevor Clifford Caldwell , Richard E. Schreier , David Alldred , Wenhua W. Yang
Abstract: In one aspect, an electrical signal converter is disclosed. The exemplary electrical signal converter may include a plurality of ordered converter elements. Element selection logic may be provided to pseudorandomly select a pointer to a switch matrix, wherein the switch matrix maps converter elements according to a stepwise “delta-two-maximum pattern.” Advantageously, pseudorandom stepwise delta-two-maximum patterns may be applied both to a first order converter, and to a feedback converter for error correction.
Abstract translation: 一方面，公开了一种电信号转换器。 示例性电信号转换器可以包括多个有序的转换器元件。 可以提供元素选择逻辑以伪随机选择指向开关矩阵的指针，其中开关矩阵根据逐步的“二进制二最大模式”来映射转换器元件。有利地，可以应用伪随机逐步的Δ-二最大模式 到一阶转换器和用于纠错的反馈转换器。
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公开(公告)号：US20140354459A1
公开(公告)日：2014-12-04
申请号：US13905251
申请日：2013-05-30
Applicant: ANALOG DEVICES TECHNOLOGY
Inventor： Trevor Clifford Caldwell , Richard E. Schreier , David Alldred , Wenhua W. Yang
IPC: H03M3/00
Abstract: In one aspect, an electrical signal converter is disclosed. The exemplary electrical signal converter may include a plurality of ordered converter elements. Element selection logic may be provided to pseudorandomly select a pointer to a switch matrix, wherein the switch matrix maps converter elements according to a stepwise “delta-two-maximum pattern.” Advantageously, pseudorandom stepwise delta-two-maximum patterns may be applied both to a first order converter, and to a feedback converter for error correction.
Abstract translation: 一方面，公开了一种电信号转换器。 示例性电信号转换器可以包括多个有序的转换器元件。 可以提供元素选择逻辑以伪随机选择指向开关矩阵的指针，其中开关矩阵根据逐步的“二进制二最大模式”来映射转换器元件。有利地，可以应用伪随机逐步的Δ-二最大模式 到一阶转换器和用于纠错的反馈转换器。
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3.发明授权System, method and recording medium for analog to digital converter calibration 有权用于模数转换器校准的系统，方法和记录介质公开(公告)号：US08884802B2
公开(公告)日：2014-11-11
申请号：US13920083
申请日：2013-06-18
Applicant: Analog Devices Technology
Inventor： Zhao Li , Shipra Bhal , Kevin Glenn Gard , David Alldred , Christopher Mayer , Trevor Clifford Caldwell , David J. McLaurin , Victor Kozlov
CPC classification number: H03M3/384 , H03M1/00 , H03M1/1009 , H03M1/12 , H03M3/458
Abstract: A calibration system for an analog-to-digital converter (ADC) an internal ADC that receives an analog input and converts the analog input to digital multi-bit data. The calibration system also includes a reference shuffling circuit that shuffles reference values of comparators of the internal ADC. Further, the calibration system includes a calibration circuit that calibrates the comparators of the internal ADC. The calibration system includes a digital block that measures an amplitude based on the digital multi-bit data. Additionally, the calibration system includes calibration logic that controls the calibration circuit based on an output of the digital block.
Abstract translation: 用于模数转换器（ADC）的校准系统，内部ADC接收模拟输入并将模拟输入转换为数字多位数据。 该校准系统还包括一个参考混洗电路，它洗牌内部ADC的比较器参考值。 此外，校准系统包括校准电路，校准内部ADC的比较器。 校准系统包括基于数字多位数据测量幅度的数字块。 此外，校准系统包括基于数字块的输出来控制校准电路的校准逻辑。
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公开(公告)号：US20150109157A1
公开(公告)日：2015-04-23
申请号：US14055980
申请日：2013-10-17
Applicant: ANALOG DEVICES TECHNOLOGY
Inventor： Trevor Clifford Caldwell , Richard E. Schreier
IPC: H03M3/00
Abstract: A delta-sigma modulator is configured to sense and convert an electromagnetic field into a digital signal. An exemplary delta-sigma modulator includes a sensor component, such as an LC resonator, that is configured to sense the electromagnetic field and generate an input analog signal, where the delta-sigma modulator is configured to convert the input analog signal to the digital signal. Delta-sigma modulator can include an analog-to-digital converter coupled to the sensor component that receives and converts the input analog signal to the digital signal. Delta-sigma modulator can further include a digital-to-analog converter (DAC) coupled to the resonator and the ADC, the DAC configured to receive the digital signal from the ADC and generate a feedback analog signal.
Abstract translation: Δ-Σ调制器被配置为感测并将电磁场转换成数字信号。 示例性的Δ-Σ调制器包括诸如LC谐振器的传感器组件，其被配置为感测电磁场并产生输入模拟信号，其中Δ-Σ调制器被配置为将输入的模拟信号转换为数字信号 。 Δ-Σ调制器可以包括耦合到传感器组件的模数转换器，其接收并将输入的模拟信号转换成数字信号。 Δ-Σ调制器还可以包括耦合到谐振器和ADC的数模转换器（DAC），DAC被配置为从ADC接收数字信号并产生反馈模拟信号。
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公开(公告)号：US08912936B1
公开(公告)日：2014-12-16
申请号：US13905251
申请日：2013-05-30
Applicant: Analog Devices Technology
Inventor： Trevor Clifford Caldwell , Richard E. Schreier , David Alldred , Wenhua W. Yang
IPC: H03M3/00
Abstract: In one aspect, an electrical signal converter is disclosed. The exemplary electrical signal converter may include a plurality of ordered converter elements. Element selection logic may be provided to pseudorandomly select a pointer to a switch matrix, wherein the switch matrix maps converter elements according to a stepwise “delta-two-maximum pattern.” Advantageously, pseudorandom stepwise delta-two-maximum patterns may be applied both to a first order converter, and to a feedback converter for error correction.
Abstract translation: 一方面，公开了一种电信号转换器。 示例性电信号转换器可以包括多个有序的转换器元件。 可以提供元素选择逻辑以伪随机选择指向开关矩阵的指针，其中开关矩阵根据逐步的“二进制二最大模式”来映射转换器元件。有利地，可以应用伪随机逐步的Δ-二最大模式 到一阶转换器和用于纠错的反馈转换器。
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Patent Agency Ranking
6.发明申请SYSTEM, METHOD AND RECORDING MEDIUM FOR ANALOG TO DIGITAL CONVERTER CALIBRATION 有权用于模拟数字转换器校准的系统，方法和记录介质公开(公告)号：US20140266825A1
公开(公告)日：2014-09-18
申请号：US13920083
申请日：2013-06-18
Applicant: Analog Devices Technology
Inventor： Zhao Li , Shipra Bhal , Kevin Glenn Gard , David Alldred , Christopher Mayer , Trevor Clifford Caldwell , David J. McLaurin , Victor Kozlov
IPC: H03M1/10
CPC classification number: H03M3/384 , H03M1/00 , H03M1/1009 , H03M1/12 , H03M3/458
Abstract: A calibration system for an analog-to-digital converter (ADC) an internal ADC that receives an analog input and converts the analog input to digital multi-bit data. The calibration system also includes a reference shuffling circuit that shuffles reference values of comparators of the internal ADC. Further, the calibration system includes a calibration circuit that calibrates the comparators of the internal ADC. The calibration system includes a digital block that measures an amplitude based on the digital multi-bit data. Additionally, the calibration system includes calibration logic that controls the calibration circuit based on an output of the digital block.
Abstract translation: 用于模数转换器（ADC）的校准系统，内部ADC接收模拟输入并将模拟输入转换为数字多位数据。 该校准系统还包括一个参考混洗电路，它洗牌内部ADC的比较器参考值。 此外，校准系统包括校准电路，校准内部ADC的比较器。 校准系统包括基于数字多位数据测量幅度的数字块。 此外，校准系统包括基于数字块的输出来控制校准电路的校准逻辑。
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公开(公告)号：US09912144B2
公开(公告)日：2018-03-06
申请号：US14477236
申请日：2014-09-04
Applicant: ANALOG DEVICES TECHNOLOGY
Inventor： Trevor Clifford Caldwell , Corey Petersen , David Nelson Alldred , Hajime Shibata
Abstract: Delta-sigma modulators do not handle overload well, and often become unstable if the input goes beyond the full-scale range of the modulator. To provide overload protection, an improved technique embeds an overload detector in the delta sigma modulator. When an overload condition is detected, coefficient(s) of the delta sigma modulator is adjusted to accommodate for the overloaded input. The improved technique advantageously allows the delta sigma modulator to handle overload gracefully without reset, and offers greater dynamic range at reduced resolution. Furthermore, the coefficient(s) of the delta sigma modulator can be adjusted in such a way to ensure the noise transfer function is not affected.
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公开(公告)号：US09407283B2
公开(公告)日：2016-08-02
申请号：US14055980
申请日：2013-10-17
Applicant: ANALOG DEVICES TECHNOLOGY
Inventor： Trevor Clifford Caldwell , Richard E. Schreier
Abstract: A delta-sigma modulator is configured to sense and convert an electromagnetic field into a digital signal. An exemplary delta-sigma modulator includes a sensor component, such as an LC resonator, that is configured to sense the electromagnetic field and generate an input analog signal, where the delta-sigma modulator is configured to convert the input analog signal to the digital signal. Delta-sigma modulator can include an analog-to-digital converter coupled to the sensor component that receives and converts the input analog signal to the digital signal. Delta-sigma modulator can further include a digital-to-analog converter (DAC) coupled to the resonator and the ADC, the DAC configured to receive the digital signal from the ADC and generate a feedback analog signal.
Abstract translation: Δ-Σ调制器被配置为感测并将电磁场转换成数字信号。 示例性的Δ-Σ调制器包括诸如LC谐振器的传感器组件，其被配置为感测电磁场并产生输入模拟信号，其中Δ-Σ调制器被配置为将输入的模拟信号转换为数字信号 。 Δ-Σ调制器可以包括耦合到传感器组件的模数转换器，其接收并将输入的模拟信号转换成数字信号。 Δ-Σ调制器还可以包括耦合到谐振器和ADC的数模转换器（DAC），DAC被配置为从ADC接收数字信号并产生反馈模拟信号。
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公开(公告)号：US09312840B2
公开(公告)日：2016-04-12
申请号：US14194107
申请日：2014-02-28
Applicant: ANALOG DEVICES TECHNOLOGY
Inventor： Yunzhi Dong , Zhao Li , Richard E. Schreier , Hajime Shibata , Trevor Clifford Caldwell
CPC classification number: H03K5/159 , H03M1/0626 , H03M1/14 , H03M1/145 , H03M1/38 , H03M3/414 , H03M3/464
Abstract: This disclosure describes techniques and methodologies of using passive continuous time (CT) delay line for high-speed CT analog-to-digital converter (ADC) applications. In a continuous-time residual producing stage common to these CT ADCs, a proper delay between the analog input and DAC output is crucial. Specifically, using an inductor-capacitor (LC) lattice based delay element to enable high-performance CT pipeline ADC and CT delta-sigma (ΔΣ) ADC. The use of an LC lattice based delay element provides wide-band group delay for continuous-time signals with well-controlled impedance. This will be an essential circuit component to build a high-performance CT ADCs especially in architectures where the generation of a low-noise and low-distortion residual between the CT signal and its digitized version is needed. LC lattice based delay element enables noise-free, distortion-free wideband delay that is required for high speed continuous-time pipeline ADC and delta-sigma ADC.
Abstract translation: 本公开描述了使用被动连续时间（CT）延迟线用于高速CT模数转换器（ADC）应用的技术和方法。 在这些CT ADC通用的连续时间残留产生阶段，模拟输入和DAC输出之间的适当延迟至关重要。 具体来说，使用电感 - 电容（LC）晶格延迟元件来实现高性能CT流水线ADC和CT delta-sigma（＆Dgr＆amp; Sgr）ADC。 使用基于LC晶格的延迟元件为具有良好控制的阻抗的连续时间信号提供宽带群延迟。 这将是构建高性能CT ADC的重要电路元件，特别是在需要CT信号与其数字化版本之间产生低噪声和低失真残差的架构中。 基于LC晶格的延迟元件实现了高速连续时间流水线ADC和Δ-ΣADC所需的无噪声，无失真的宽带延迟。
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公开(公告)号：US20150249445A1
公开(公告)日：2015-09-03
申请号：US14194107
申请日：2014-02-28
Applicant: ANALOG DEVICES TECHNOLOGY
Inventor： Yunzhi Dong , Zhao Li , Richard E. Schreier , Hajime Shibata , Trevor Clifford Caldwell
CPC classification number: H03K5/159 , H03M1/0626 , H03M1/14 , H03M1/145 , H03M1/38 , H03M3/414 , H03M3/464
Abstract: This disclosure describes techniques and methodologies of using passive continuous time (CT) delay line for high-speed CT analog-to-digital converter (ADC) applications. In a continuous-time residual producing stage common to these CT ADCs, a proper delay between the analog input and DAC output is crucial. Specifically, using an inductor-capacitor (LC) lattice based delay element to enable high-performance CT pipeline ADC and CT delta-sigma (ΔΣ) ADC. The use of an LC lattice based delay element provides wide-band group delay for continuous-time signals with well-controlled impedance. This will be an essential circuit component to build a high-performance CT ADCs especially in architectures where the generation of a low-noise and low-distortion residual between the CT signal and its digitized version is needed. LC lattice based delay element enables noise-free, distortion-free wideband delay that is required for high speed continuous-time pipeline ADC and delta-sigma ADC.
Abstract translation: 本公开描述了使用被动连续时间（CT）延迟线用于高速CT模数转换器（ADC）应用的技术和方法。 在这些CT ADC通用的连续时间残留产生阶段，模拟输入和DAC输出之间的适当延迟至关重要。 具体来说，使用电感 - 电容（LC）晶格延迟元件来实现高性能CT流水线ADC和CT delta-sigma（＆Dgr＆amp; Sgr）ADC。 使用基于LC晶格的延迟元件为具有良好控制的阻抗的连续时间信号提供宽带群延迟。 这将是构建高性能CT ADC的重要电路元件，特别是在需要CT信号与其数字化版本之间产生低噪声和低失真残差的架构中。 基于LC晶格的延迟元件实现了高速连续时间流水线ADC和Δ-ΣADC所需的无噪声，无失真的宽带延迟。
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