Abstract:
A printed circuit board having an electronic component which is to be cooled by a cooling surface biased thereon, where the biasing elements are abutted not by the PCB but a stiffer element attached to the PCB in order to not strain or bend the PCB.
Abstract:
A thermally controlled assembly having two parallel PCBs defining there between, and by the aid of a channel forming element, a channel in which air is forced, using a fan, to cool components in the channel. The fan has a cooling surface cooled by air from the fan and which is biased toward an element provided in a space below the cooling surface. The forced air also drawing air from outside the assembly through the space and into the channel to cool other elements provided in the space.
Abstract:
In conventional systems the CPU is altered after a data frame has been received and the packet stored in a host buffer. This interrupts normal operation of the CPU and applications, which is determined to systems performance. The invention relates to a method of transferring data from a network to a host using a network analyzer card, where a plurality of data frames from a network link is received and a descriptor is added to the frame. The descriptor includes data about the frame; each data frame and its or their attached descriptor is transferred to a host memory.
Abstract:
A printed circuit board having an electronic component which is to be cooled by a cooling surface biased thereon, where the biasing elements are abutted not by the PCB but a stiffer element attached to the PCB in order to not strain or bend the PCB.
Abstract:
An apparatus and method for analyzing a data packet, where the first and second information is derived relating to the data packet. The first information relates to a type of the data packet, a standard to which the data packet conforms and/or which data item(s) is/are present in the data packet. The first information is used for identifying a function into which the second information is input to generate third, and this third information is output together with at least part of the data packet.
Abstract:
A network card or the like with two or more connectors having reflecting sides, where a light emitter is positioned between or behind the connectors and emit light toward the reflecting sides which act as a wave guide and guide the light to an opening between the connectors and toward the surroundings.
Abstract:
A method and apparatus adapted to prevent Head-Of-Line blocking by forwarding dummy packets to queues which have not received data for a predetermined period of time. This prevention of HOL may be on an input where data is forwarded to each of a number of FIFOs or an output where data is de-queued from FIFOs. The dummy packets may be provided with a time stamp derived from a recently queued or de-queued packet.
Abstract:
An assembly where a number of receivers receiving packets for storing in queues in a storage and a means for de-queuing data from the storage. A controller determines addresses for the storage, the address being determined on the basis of at least a fill level of the queue(s), where information relating to de-queues addresses is only read-out when the fill-level(s) exceed a limit so as to not spend bandwidth on this information before it is required.
Abstract:
An apparatus and a method for receiving and forwarding packets, where the packets are received by a number of adapters and fed to a common storage in addresses allocated by a controller. The controller is adapted to forward to the adapters requests and at the same time log which addresses have been allocated to each adapter. As a response to the request, the individual adapter forwards predetermined data to predetermined addresses in the storage so that the controller is able to update the available or the used addresses in the storage.
Abstract:
An assembly and a method where a number of receiving units receive and store data in a number of queues de-queued by a plurality of processors/processes. If a selected queue for one processor has a fill level exceeding a limit, the packet is forwarded to a queue of another processor which is instructed to not de-queue that queue until the queue with the exceeded fill level has been emptied. Thus, load balancing between processes/processors may be obtained while maintaining an ordering between packets.