公开(公告)号：US08243222B2

公开(公告)日：2012-08-14

申请号：US12831328

申请日：2010-07-07

Applicant: Chang-Bin Lee ,  Byung-Kook Choi

Inventor： Chang-Bin Lee ,  Byung-Kook Choi

IPC: G02F1/136 ,  G02F1/1343

CPC classification number: G02F1/1362 ,  G02F1/13458 ,  G02F1/136286 ,  G02F2001/136231 ,  G02F2201/123

Abstract: A method of manufacturing an array substrate for a liquid crystal display device includes forming a gate electrode and a gate line on a substrate through a first mask process, forming a first insulating layer, an active layer, an ohmic contact layer, a buffer metallic layer, and a data line on the substrate including the gate electrode and the gate line through a second mask process, and forming a source electrode, a drain electrode, and a pixel electrode through a third mask process, the pixel electrode extending from the drain electrode, wherein the active layer is disposed over and within the gate electrode.

Abstract translation: 一种制造液晶显示装置用阵列基板的方法包括通过第一掩模工艺在基板上形成栅电极和栅极线，形成第一绝缘层，有源层，欧姆接触层，缓冲金属层 以及通过第二掩模处理在包括栅电极和栅极线的基板上的数据线，并且通过第三掩模处理形成源电极，漏电极和像素电极，从漏电极延伸的像素电极 ，其中所述有源层设置在所述栅电极之上和之内。

公开(公告)号：US08198111B2

公开(公告)日：2012-06-12

申请号：US12410839

申请日：2009-03-25

Applicant: Hyo-Uk Kim ,  Chang-Bin Lee ,  Byung-Kook Choi ,  Dong-Young Kim

Inventor： Hyo-Uk Kim ,  Chang-Bin Lee ,  Byung-Kook Choi ,  Dong-Young Kim

IPC: H01L21/308 ,  H01L33/00

CPC classification number: H01L27/124 ,  G02F1/136286 ,  G02F2001/136236 ,  H01L27/1288 ,  H01L29/42384 ,  H01L29/78633

Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line on the substrate, a data line crossing the gate line to define a pixel region, a thin film transistor connected to the gate line and the data line and including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, and a pixel electrode in the pixel region and connected to the thin film transistor, wherein the data line includes a transparent conductive layer and an opaque conductive layer, and each of the source and drain electrodes and the pixel electrode includes a transparent conductive layer.

Abstract translation: 用于液晶显示装置的阵列基板包括：基板，基板上的栅极线，与栅极线交叉以限定像素区域的数据线，连接到栅极线和数据线的薄膜晶体管，并且包括栅极 电极，有源层，欧姆接触层，缓冲金属层，源电极和漏电极，以及像素区域中的像素电极，并连接到薄膜晶体管，其中数据线包括透明导电层和 不透明导电层，源极和漏极以及像素电极中的每一个包括透明导电层。

公开(公告)号：US20080169470A1

公开(公告)日：2008-07-17

申请号：US12003626

申请日：2007-12-28

Applicant: Joo Soo Lim ,  Hyun Seok Hong ,  Chang Bin Lee

Inventor： Joo Soo Lim ,  Hyun Seok Hong ,  Chang Bin Lee

IPC: H01L33/00 ,  H01L21/00

CPC classification number: H01L27/1288 ,  G02F1/136227 ,  G02F2001/136231 ,  G02F2001/136236 ,  H01L27/1214 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A thin film transistor (TFT) array substrate and a method of manufacturing the same that is capable of decreasing the number of usage of exposure masks to reduce the process time and the process costs and excessively etching a passivation film below a photoresist pattern to easily perform a lift-off process of the photoresist pattern are disclosed. The TFT array substrate includes a gate line layer including a gate line formed on a substrate, a gate electrode diverging from the gate line, and a gate pad formed at the end of the gate line, a gate insulation film formed on the gate line layer, a semiconductor layer formed on the gate insulation film above the gate electrode, a data line layer including a data line intersecting the gate line, source and drain electrodes formed at opposite sides of the semiconductor layer, and a data pad formed at the end of the data line, a pixel electrode contacting the drain electrode, first and second oxidation preventing films contacting the gate pad and the data pad, and an at least two-layered passivation film deposited on the data line layer. The uppermost layer of the at least two-layered passivation film is formed at the remaining region excluding a region where the pixel electrode and the first and second oxidation preventing films are formed.

Abstract translation: 一种薄膜晶体管（TFT）阵列基板及其制造方法，其能够减少曝光掩模的使用次数以减少处理时间和处理成本，并且过度地蚀刻光致抗蚀剂图案之下的钝化膜以容易地执行 公开了光致抗蚀剂图案的剥离过程。 TFT阵列基板包括栅极线层，栅极线包括形成在基板上的栅极线，从栅极线发散的栅电极和形成在栅极线的端部的栅极焊盘，形成在栅极线层上的栅极绝缘膜 形成在栅极电极上方的栅极绝缘膜上的半导体层，包括与栅极线交叉的数据线的数据线层，形成在半导体层的相对侧的源极和漏极;以及形成在栅极绝缘膜的末端的数据焊盘 数据线，与漏电极接触的像素电极，与栅极焊盘和数据焊盘接触的第一和第二氧化防止膜以及沉积在数据线层上的至少两层钝化膜。 至少两层钝化膜的最上层形成在除了形成像素电极和第一和第二氧化防止膜的区域之外的剩余区域。

公开(公告)号：US20080002082A1

公开(公告)日：2008-01-03

申请号：US11638437

申请日：2006-12-14

Applicant: Chang-Bin Lee ,  Byung-Kook Choi

Inventor： Chang-Bin Lee ,  Byung-Kook Choi

IPC: G02F1/136

CPC classification number: G02F1/1362 ,  G02F1/13458 ,  G02F1/136286 ,  G02F2001/136231 ,  G02F2201/123

Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line on the substrate, a data line crossing the gate line to define a pixel region, a thin film transistor including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, the thin film transistor being electrically connected to the gate line and the data line and a pixel electrode in the pixel region and connected to the thin film transistor, wherein the active layer is disposed over and within the gate electrode.

Abstract translation: 液晶显示装置用阵列基板包括：基板，基板上的栅极线，与栅极线交叉以形成像素区域的数据线;薄膜晶体管，包括栅电极，有源层，欧姆接触层 缓冲金属层，源电极和漏电极，薄膜晶体管电连接到像素区域中的栅极线和数据线以及像素电极，并连接到薄膜晶体管，其中有源层是 设置在栅电极之上和之内。

公开(公告)号：US20080001177A1

公开(公告)日：2008-01-03

申请号：US11639567

申请日：2006-12-15

Applicant: Hyo-Uk Kim ,  Chang-Bin Lee ,  Byung-Kook Choi ,  Dong-Young Kim

Inventor： Hyo-Uk Kim ,  Chang-Bin Lee ,  Byung-Kook Choi ,  Dong-Young Kim

IPC: H01L29/76

CPC classification number: H01L27/124 ,  G02F1/136286 ,  G02F2001/136236 ,  H01L27/1288 ,  H01L29/42384 ,  H01L29/78633

Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line on the substrate, a data line crossing the gate line to define a pixel region, a thin film transistor connected to the gate line and the data line and including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, and a pixel electrode in the pixel region and connected to the thin film transistor, wherein the data line includes a transparent conductive layer and an opaque conductive layer, and each of the source and drain electrodes and the pixel electrode includes a transparent conductive layer.

Abstract translation: 用于液晶显示装置的阵列基板包括：基板，基板上的栅极线，与栅极线交叉以限定像素区域的数据线，连接到栅极线和数据线的薄膜晶体管，并且包括栅极 电极，有源层，欧姆接触层，缓冲金属层，源电极和漏电极，以及像素区域中的像素电极，并连接到薄膜晶体管，其中数据线包括透明导电层和 不透明导电层，源极和漏极以及像素电极中的每一个包括透明导电层。

公开(公告)号：US07528409B2

公开(公告)日：2009-05-05

申请号：US11639567

申请日：2006-12-15

Applicant: Hyo-Uk Kim ,  Chang-Bin Lee ,  Byung-Kook Choi ,  Dong-Young Kim

Inventor： Hyo-Uk Kim ,  Chang-Bin Lee ,  Byung-Kook Choi ,  Dong-Young Kim

IPC: H01L29/10 ,  H01L29/76 ,  H01L31/036 ,  H01L31/112 ,  H01L29/04 ,  H01L31/0376 ,  H01L31/20 ,  H01L29/15 ,  H01L31/062 ,  H01L31/113

CPC classification number: H01L27/124 ,  G02F1/136286 ,  G02F2001/136236 ,  H01L27/1288 ,  H01L29/42384 ,  H01L29/78633

Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line on the substrate, a data line crossing the gate line to define a pixel region, a thin film transistor connected to the gate line and the data line and including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, and a pixel electrode in the pixel region and connected to the thin film transistor, wherein the data line includes a transparent conductive layer and an opaque conductive layer, and each of the source and drain electrodes and the pixel electrode includes a transparent conductive layer.

Abstract translation: 用于液晶显示装置的阵列基板包括：基板，基板上的栅极线，与栅极线交叉以限定像素区域的数据线，连接到栅极线和数据线的薄膜晶体管，并且包括栅极 电极，有源层，欧姆接触层，缓冲金属层，源电极和漏电极，以及像素区域中的像素电极，并连接到薄膜晶体管，其中数据线包括透明导电层和 不透明导电层，源极和漏极以及像素电极中的每一个包括透明导电层。

公开(公告)号：US20090186438A1

公开(公告)日：2009-07-23

申请号：US12410839

申请日：2009-03-25

Applicant: Hyo-Uk KIM ,  Chang-Bin LEE ,  Byung-Kook CHOI ,  Dong-Yong KIM

Inventor： Hyo-Uk KIM ,  Chang-Bin LEE ,  Byung-Kook CHOI ,  Dong-Yong KIM

IPC: H01L21/28

CPC classification number: H01L27/124 ,  G02F1/136286 ,  G02F2001/136236 ,  H01L27/1288 ,  H01L29/42384 ,  H01L29/78633

Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line on the substrate, a data line crossing the gate line to define a pixel region, a thin film transistor connected to the gate line and the data line and including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, and a pixel electrode in the pixel region and connected to the thin film transistor, wherein the data line includes a transparent conductive layer and an opaque conductive layer, and each of the source and drain electrodes and the pixel electrode includes a transparent conductive layer.

Abstract translation: 用于液晶显示装置的阵列基板包括：基板，基板上的栅极线，与栅极线交叉以限定像素区域的数据线，连接到栅极线和数据线的薄膜晶体管，并且包括栅极 电极，有源层，欧姆接触层，缓冲金属层，源电极和漏电极，以及像素区域中的像素电极，并连接到薄膜晶体管，其中数据线包括透明导电层和 不透明导电层，源极和漏极以及像素电极中的每一个包括透明导电层。