公开(公告)号：US20080311715A1

公开(公告)日：2008-12-18

申请号：US12068617

申请日：2008-02-08

Applicant: Po-Kang Hu ,  Cheng-Che Lee ,  Ta-Wei Tung ,  Meng-Cheng Chen

Inventor： Po-Kang Hu ,  Cheng-Che Lee ,  Ta-Wei Tung ,  Meng-Cheng Chen

IPC: H01L21/8236

CPC classification number: H01L29/4236 ,  H01L21/2252 ,  H01L27/10876 ,  H01L29/105 ,  H01L29/66621

Abstract: A method for forming a semiconductor device is disclosed. A substrate comprising trenches are provided. Dopants are doped into a region of the substrate neighboring a sidewall of the trenches by using an isotropic doping method. A gate dielectric layer is formed on the sidewall of the substrate. A gate electrode is formed in the trenches, wherein the gate electrode protrudes a surface of the substrate.

Abstract translation: 公开了一种用于形成半导体器件的方法。 提供了包括沟槽的衬底。 通过使用各向同性掺杂方法将掺杂剂掺杂到与沟槽的侧壁相邻的衬底的区域中。 栅介质层形成在衬底的侧壁上。 在沟槽中形成栅电极，其中栅电极突出基片的表面。

公开(公告)号：US06569731B1

公开(公告)日：2003-05-27

申请号：US10214191

申请日：2002-08-08

Applicant: Yung-Hsien Wu ,  Cheng-Che Lee

Inventor： Yung-Hsien Wu ,  Cheng-Che Lee

IPC: H01L218242

CPC classification number: H01L21/3144 ,  H01L21/3185 ,  H01L27/10835

Abstract: A method of forming capacitor dielectric structure. The method includes steps of providing a semiconductor substrate having at least a predetermined capacitor structure, using silicon nitride deposition to form a SiN layer on the predetermined capacitor structure, using a reoxidation process to grow an oxide layer on the SiN layer, and using a nitridation process with N2O as a reactive gas to form a nitridation layer on the oxide layer.

Abstract translation: 一种形成电容器电介质结构的方法。 该方法包括以下步骤：使用氮化硅沉积法，使用氮化硅沉积法在预定电容器结构上提供具有至少预定电容器结构的半导体衬底，使用再氧化工艺在SiN层上生长氧化物层，并使用氮化 处理N2O作为反应气体，以在氧化物层上形成氮化层。

公开(公告)号：US20120104096A1

公开(公告)日：2012-05-03

申请号：US13281461

申请日：2011-10-26

Applicant: Cheng-Che Lee ,  Wen-Hai Tsai ,  Keng-Hao Chang ,  Chiu-Chin Yang ,  Waken Chen ,  Jih-Hsin Yeh

Inventor： Cheng-Che Lee ,  Wen-Hai Tsai ,  Keng-Hao Chang ,  Chiu-Chin Yang ,  Waken Chen ,  Jih-Hsin Yeh

IPC: G06K5/00 ,  C12M1/34 ,  G06K7/06 ,  B01L3/00

CPC classification number: B01L3/5023 ,  B01L2200/04 ,  B01L2300/021 ,  B01L2300/0825 ,  G01N33/48771

Abstract: The present invention discloses a biological measuring device with auto coding capabilities. In accordance with one embodiment of the present invention, the biological measuring device with auto coding capabilities includes a test strip having a substrate and at least a first contact pad and a second contact pad provided on the substrate; and a code reader having at least a first metal pin and a second metal pin to couple to the first contact pad and the second contact pad to obtain coding information associated with the test strip, wherein the code reader is capable of reading the coding information based on a movement of the test strip before the test strip is placed still in relation to the code reader for a proper reading of a sample.

Abstract translation: 本发明公开了一种具有自动编码能力的生物测量装置。 根据本发明的一个实施例，具有自动编码能力的生物测量装置包括具有衬底和至少第一接触焊盘和设置在衬底上的第二接触焊盘的测试条; 以及代码阅读器，具有至少第一金属引脚和第二金属引脚，以耦合到所述第一接触焊盘和所述第二接触焊盘以获得与所述测试条相关联的编码信息，其中所述代码读取器能够读取基于编码信息的编码信息 在测试条被放置在仍然相对于代码阅读器以正确读取样本之前的测试条的移动。

公开(公告)号：US07592219B2

公开(公告)日：2009-09-22

申请号：US11624220

申请日：2007-01-18

Applicant: Tsung-De Lin ,  Cheng-Che Lee

Inventor： Tsung-De Lin ,  Cheng-Che Lee

IPC: H01L21/8242

CPC classification number: H01L28/60 ,  H01L27/10814 ,  H01L27/10855

Abstract: A method of fabricating a capacitor over bit line (COB) is provided. First, a substrate is provided and a plurality of word lines is formed on the substrate. Next, a plurality of landing plug contacts (LPCs) are formed between the word lines and a plurality of first contacts is then formed on the LPCs. Thereafter, a plurality of second contacts is formed on a first portions of the first contacts and a plurality of bit lines connecting a second portions of the first contacts is formed, simultaneously. An inter-layer dielectric (ILD) layer is formed on the substrate to cover the second contacts and the bit lines. Subsequently, a plurality of capacitors is formed in the ILD layer. Thus, the fabrication of the capacitor is simplified.

Abstract translation: 提供了一种通过位线（COB）制造电容器的方法。 首先，提供基板，并在基板上形成多个字线。 接下来，在字线之间形成多个着陆插头触点（LPC），然后在LPC上形成多个第一触点。 此后，多个第二触点形成在第一触点的第一部分上，同时形成连接第一触点的第二部分的多个位线。 在衬底上形成层间介电层（ILD）层以覆盖第二接触点和位线。 随后，在ILD层中形成多个电容器。 因此，简化了电容器的制造。

公开(公告)号：US20080274602A1

公开(公告)日：2008-11-06

申请号：US11767222

申请日：2007-06-22

Applicant: Cheng-Che Lee ,  Tao-Yi Chang ,  Tsung-De Lin

Inventor： Cheng-Che Lee ,  Tao-Yi Chang ,  Tsung-De Lin

IPC: H01L21/20

CPC classification number: H01L21/76897 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76846 ,  H01L21/76855 ,  H01L27/10855 ,  H01L27/10888

Abstract: A method of manufacturing a DRAM includes firstly providing a substrate. Many transistors are then formed on the substrate. Next, a first and a second LPCs are formed between the transistors. A first dielectric layer is then formed on the substrate, and a first opening exposing the first LPC is formed in the first dielectric layer. Thereafter, a barrier layer is formed on the first dielectric layer. Afterwards, a BLC is formed in the first opening, and a BL is formed on the first dielectric layer. A liner layer is then formed on a sidewall of the BL. Next, a second dielectric layer having a dry etching rate substantially equal to that of the liner layer and having a wet etching rate larger than that of the liner layer is formed on the substrate. Finally, an SNC is formed in the first and the second dielectric layers.

Abstract translation: 制造DRAM的方法包括首先提供衬底。 然后在衬底上形成许多晶体管。 接下来，在晶体管之间形成第一和第二LPC。 然后在衬底上形成第一电介质层，并且在第一电介质层中形成暴露第一LPC的第一开口。 此后，在第一电介质层上形成阻挡层。 之后，在第一开口中形成BLC，在第一介电层上形成BL。 然后在BL的侧壁上形成衬垫层。 接下来，在基板上形成具有与衬垫层的干蚀刻速率基本相等且具有大于衬层的湿刻蚀速率的干蚀刻速率的第二介质层。 最后，在第一和第二电介质层中形成SNC。

公开(公告)号：US06495476B1

公开(公告)日：2002-12-17

申请号：US09642939

申请日：2000-08-22

Applicant: Cheng-Che Lee ,  Chung-Chih Liu

Inventor： Cheng-Che Lee ,  Chung-Chih Liu

IPC: H01L2131

CPC classification number: H01L21/3185 ,  C23C8/02 ,  C23C8/24

Abstract: A method for forming a layer of silicon nitride that includes providing at least one silicon wafer in a first chamber with ammonia gas, wherein the first chamber is substantially enclosed, and the at least one silicon wafer reacts with the ammonia gas to form a first layer of silicon nitride on the at least one silicon wafer, providing a second chamber with the ammonia gas, moving the at least one silicon wafer into the second chamber, and forming a second layer of silicon nitride on the silicon wafer.

Abstract translation: 一种用于形成氮化硅层的方法，其包括在第一室中提供氨气至少一个硅晶片，其中所述第一室基本封闭，并且所述至少一个硅晶片与氨气反应形成第一层 在所述至少一个硅晶片上提供氮化硅，提供具有所述氨气的第二室，将所述至少一个硅晶片移动到所述第二室中，以及在所述硅晶片上形成第二氮化硅层。

公开(公告)号：US08396341B2

公开(公告)日：2013-03-12

申请号：US12609025

申请日：2009-10-30

Applicant: Kun-Yi Lee ,  Wei-Ching Chuang ,  Cheng-Che Lee ,  Wei-Yu Lee

Inventor： Kun-Yi Lee ,  Wei-Ching Chuang ,  Cheng-Che Lee ,  Wei-Yu Lee

IPC: G02B6/00

CPC classification number: G02B6/12007 ,  G02B6/124 ,  G02B6/138

Abstract: The present invention discloses a method for fabricating an optical filter based on polymer asymmetric bragg couplers using holographic interference techniques, soft lithography, and micro molding, which comprises following steps: prepare a UV polymer with gratings; coating photo-resister film on the UV polymer, and exposed by UV light to obtain a photo-resister mold with two grooves each having gratings; coating diluted PDMS film on the photo-resister mold, and baking the PDMS film to obtain a PDMS mold having two waveguides with gratings; placing glass substrate over the PDMS mold to form a first tunnel; injecting a precure UV polymer into the first tunnel to from a cladding layer with two grooves having gratings pattern at its bottom; placing glass slide over the cladding layer and injecting a mixed UV polymer into the grooves to form waveguide cores; placing a second glass substrate over the cladding layer, and injecting UV polymer to form an upper cladding layer laminated with the cladding layer to obtain the optical filter based on polymer asymmetric bragg couplers.

Abstract translation: 本发明公开了一种基于聚合物非对称布拉格耦合器的光学滤波器的制造方法，该方法使用全息干涉技术，软光刻技术和微型成型技术，其包括以下步骤：制备具有光栅的UV聚合物; 在紫外线聚合物上涂覆光阻膜，并通过紫外光曝光，得到具有两个光栅的两个凹槽的光阻模具; 在光电吸收模具上涂覆稀释的PDMS膜，并烘烤PDMS膜以获得具有带光栅的两个波导的PDMS模具; 将玻璃基板放置在PDMS模具上以形成第一隧道; 将预固化UV聚合物注入到具有在其底部具有格栅图案的两个凹槽的包层的第一隧道中; 将玻璃载玻片放置在包覆层上，并将混合的UV聚合物注入凹槽中以形成波导芯; 将第二玻璃基板放置在包覆层上，并且注入UV聚合物以形成层叠有包覆层的上包层，以获得基于聚合物不对称布拉格耦合器的滤光器。

公开(公告)号：US20110103762A1

公开(公告)日：2011-05-05

申请号：US12609025

申请日：2009-10-30

Applicant: KUN-YI LEE ,  Wei-Ching Chuang ,  Cheng-Che Lee ,  Wei-Yu Lee

Inventor： KUN-YI LEE ,  Wei-Ching Chuang ,  Cheng-Che Lee ,  Wei-Yu Lee

IPC: G02B6/00 ,  B29C35/08 ,  G02B6/34

CPC classification number: G02B6/12007 ,  G02B6/124 ,  G02B6/138

Abstract: The present invention discloses a method for fabricating an optical filter based on polymer asymmetric bragg couplers using holographic interference techniques, soft lithography, and micro molding, which comprises following steps: prepare a UV polymer with gratings; coating photo-resister film on the UV polymer, and exposed by UV light to obtain a photo-resister mold with two grooves each having gratings; coating diluted PDMS film on the photo-resister mold, and baking the PDMS film to obtain a PDMS mold having two waveguides with gratings; placing glass substrate over the PDMS mold to form a first tunnel; injecting a precure UV polymer into the first tunnel to from a cladding layer with two grooves having gratings pattern at its bottom; placing glass slide over the cladding layer and injecting a mixed UV polymer into the grooves to form waveguide cores; placing a second glass substrate over the cladding layer, and injecting UV polymer to form an upper cladding layer laminated with the cladding layer to obtain the optical filter based on polymer asymmetric bragg couplers.

Abstract translation: 本发明公开了一种基于聚合物非对称布拉格耦合器的光学滤波器的制造方法，该方法使用全息干涉技术，软光刻技术和微型成型技术，其包括以下步骤：制备具有光栅的UV聚合物; 在紫外线聚合物上涂覆光阻膜，并通过紫外光曝光，得到具有两个光栅的两个凹槽的光阻模具; 在光电吸收模具上涂覆稀释的PDMS膜，并烘烤PDMS膜以获得具有带光栅的两个波导的PDMS模具; 将玻璃基板放置在PDMS模具上以形成第一隧道; 将预固化UV聚合物注入到具有在其底部具有格栅图案的两个凹槽的包层的第一隧道中; 将玻璃载玻片放置在包覆层上，并将混合的UV聚合物注入凹槽中以形成波导芯; 将第二玻璃基板放置在包覆层上，并注入UV聚合物以形成层叠有包覆层的上包层，以获得基于聚合物不对称布拉格耦合器的滤光器。

公开(公告)号：US07853102B2

公开(公告)日：2010-12-14

申请号：US11945973

申请日：2007-11-27

Applicant: Kun-Yi Lee ,  Wei-Ching Chuang ,  Kuen-Cherng Lin ,  Cheng-Che Lee ,  Wei-Yu Lee

Inventor： Kun-Yi Lee ,  Wei-Ching Chuang ,  Kuen-Cherng Lin ,  Cheng-Che Lee ,  Wei-Yu Lee

IPC: G02B6/34

CPC classification number: B29D11/00663 ,  G02B6/124 ,  G02B6/138

Abstract: The present invention discloses a method for fabricating polymer wavelength filter with high-resolution periodical structure, which comprises: a positive photo-resister film is coated or a substrate, holographically exposed with grating pattern, and coated with a negative photo-resister film, then exposed by UV light and developed to obtain a waveguide mold having negative waveguide; a PDMS film coated on the waveguide mold, baked and peeled off to obtain a PDMS mold; a first tunnel formed over the PDMS mold, injected with a first UV polymer, then cured and separated the first UV polymer having groove to be the cladding layer of the polymer wavelength filter; a second UV polymer injected into the groove of the cladding layer, and cured to form the core of the waveguide in the groove of the cladding layer to finally be the polymer wavelength filter.

Abstract translation: 本发明公开了一种制造具有高分辨率周期结构的聚合物波长滤光片的方法，包括：用光栅图案全息曝光并涂上负光阻膜，然后涂覆正光阻膜或基片 通过紫外光曝光并开发得到具有负波导的波导模具; 将PDMS薄膜涂覆在波导模具上，烘烤并剥离以获得PDMS模具; 形成在PDMS模具上的第一隧道，注入第一UV聚合物，然后将具有沟槽的第一UV聚合物固化并分离成聚合物波长滤光器的包层; 注入到包层的槽中的第二UV聚合物，并且被固化以在包层的沟槽中形成波导的芯，最终成为聚合物波长滤波器。

公开(公告)号：US20080124886A1

公开(公告)日：2008-05-29

申请号：US11624220

申请日：2007-01-18

Applicant: Tsung-De Lin ,  Cheng-Che Lee

Inventor： Tsung-De Lin ,  Cheng-Che Lee

IPC: H01L21/768

CPC classification number: H01L28/60 ,  H01L27/10814 ,  H01L27/10855

Abstract: A method of fabricating a capacitor over bit line (COB) is provided. First, a substrate is provided and a plurality of word lines is formed on the substrate. Next, a plurality of landing plug contacts (LPCs) are formed between the word lines and a plurality of first contacts is then formed on the LPCs. Thereafter, a plurality of second contacts is formed on a first portions of the first contacts and a plurality of bit lines connecting a second portions of the first contacts is formed, simultaneously. An inter-layer dielectric (ILD) layer is formed on the substrate to cover the second contacts and the bit lines. Subsequently, a plurality of capacitors is formed in the ILD layer. Thus, the fabrication of the capacitor is simplified.

Abstract translation: 提供了一种通过位线（COB）制造电容器的方法。 首先，提供基板，并在基板上形成多个字线。 接下来，在字线之间形成多个着陆插头触点（LPC），然后在LPC上形成多个第一触点。 此后，多个第二触点形成在第一触点的第一部分上，同时形成连接第一触点的第二部分的多个位线。 在衬底上形成层间介电层（ILD）层以覆盖第二接触点和位线。 随后，在ILD层中形成多个电容器。 因此，简化了电容器的制造。