公开(公告)号：US20070045636A1

公开(公告)日：2007-03-01

申请号：US11494257

申请日：2006-07-27

Applicant: Shin-Tack Kang ,  Dong-Hyeon Ki ,  Sung-Man Kim ,  Sang-Hoon Lee

Inventor： Shin-Tack Kang ,  Dong-Hyeon Ki ,  Sung-Man Kim ,  Sang-Hoon Lee

IPC: H01L33/00

CPC classification number: G02F1/136227 ,  G02F1/13458 ,  G02F2001/136236 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1288 ,  H01L29/41733

Abstract: A display substrate includes a substrate, a first insulating layer, an undercut compensating member, a first electrode, a second insulating layer and a first conductive pattern. The first insulating layer is formed on the substrate. The undercut compensating member is formed on the first insulating layer. The undercut compensating member has an etching rate smaller than that of the first insulating layer. The first electrode is formed on a portion of the undercut compensating member. The second insulating layer is formed on the first insulating layer. The second insulating layer has a contact hole through which a portion of the first electrode and a remaining portion of the undercut compensating member. The first conductive pattern electrically connected to the first electrode through the contact hole.

Abstract translation: 显示基板包括基板，第一绝缘层，底切补偿元件，第一电极，第二绝缘层和第一导电图案。 第一绝缘层形成在基板上。 底切补偿部件形成在第一绝缘层上。 底切补偿构件的蚀刻速率小于第一绝缘层的蚀刻速率。 第一电极形成在底切补偿部件的一部分上。 第二绝缘层形成在第一绝缘层上。 第二绝缘层具有接触孔，第一电极的一部分和底切补偿部件的剩余部分穿过该接触孔。 第一导电图案通过接触孔与第一电极电连接。

公开(公告)号：US20070001947A1

公开(公告)日：2007-01-04

申请号：US11479233

申请日：2006-06-30

Applicant: Dong-Hyeon Ki

Inventor： Dong-Hyeon Ki

IPC: G09G3/36

CPC classification number: G09G3/006 ,  G02F1/136286 ,  G02F2001/136254 ,  G02F2001/136272 ,  H01L27/3276

Abstract: A thin film panel is provided, which includes a first signal line and a second signal line crossing the first signal line and formed on a different layer from the first signal line. The second signal line includes an expansion having an enlarged area and at least one cutout, and is disposed adjacent to a crossing region where the second signal line crosses the first signal line.

Abstract translation: 提供薄膜面板，其包括与第一信号线交叉并形成在与第一信号线不同的层上的第一信号线和第二信号线。 第二信号线包括具有放大区域的扩展和至少一个切口，并且与第二信号线穿过第一信号线的交叉区域相邻设置。

公开(公告)号：US06906776B2

公开(公告)日：2005-06-14

申请号：US10626738

申请日：2003-07-25

Applicant: Woon-Yong Park ,  Hyeon-Hwan Kim ,  Dong-Hyeon Ki

Inventor： Woon-Yong Park ,  Hyeon-Hwan Kim ,  Dong-Hyeon Ki

IPC: G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  G09F9/00 ,  H01L21/336 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786 ,  G02F1/13

CPC classification number: H01L29/66765 ,  G02F1/134363 ,  G02F1/13458 ,  G02F1/1368 ,  G02F2001/136231 ,  H01L27/12 ,  H01L29/78669

Abstract: A method for fabricating a thin film array substrate for a liquid crystal display includes steps of forming a gate line assembly and a common electrode line assembly on a first substrate. The gate line assembly includes a plurality of gate lines and gate pads, and the common electrode line assembly includes common signal lines and common electrodes. Thereafter, a gate insulating layer is formed on the first substrate, and a semiconductor pattern and an ohmic contact pattern are formed on the gate insulating layer. A data line assembly and pixel electrodes are then formed on the first substrate. The data line assembly includes a plurality of data lines, data pads, and source and drain electrodes. The pixel electrodes are connected to the drain electrodes while proceeding parallel to the common electrodes. A passivation layer is formed on the substrate. The passivation layer and the gate insulating layer are etched such that the gate pads and the data pads are exposed to the outside. At this time, the etching is performed after an assembly process where a second substrate is arranged to face the first substrate and assembled together and the passivation layer and the gate insulating layer are exposed outside of the second substrate.

Abstract translation: 制造液晶显示器用薄膜阵列基板的方法包括在第一基板上形成栅线组合体和公共电极线组合体的工序。 栅极线组件包括多个栅极线和栅极焊盘，并且公共电极线组件包括公共信号线和公共电极。 此后，在第一基板上形成栅极绝缘层，并且在栅极绝缘层上形成半导体图案和欧姆接触图案。 然后在第一基板上形成数据线组件和像素电极。 数据线组件包括多条数据线，数据焊盘以及源极和漏极。 像素电极在平行于公共电极的同时连接到漏电极。 在衬底上形成钝化层。 蚀刻钝化层和栅极绝缘层，使得栅极焊盘和数据焊盘暴露于外部。 此时，在将第二基板布置成面对第一基板并组装在一起并且钝化层和栅极绝缘层暴露在第二基板外部的组装工艺之后进行蚀刻。

公开(公告)号：US20110221988A1

公开(公告)日：2011-09-15

申请号：US12900436

申请日：2010-10-07

Applicant: Se-Hyoung Cho ,  Dong-Gyu Kim ,  Mee-Hye Jung ,  Dong-Hyeon Ki ,  Seung-Soo Baek ,  Hye-Seok Na

Inventor： Se-Hyoung Cho ,  Dong-Gyu Kim ,  Mee-Hye Jung ,  Dong-Hyeon Ki ,  Seung-Soo Baek ,  Hye-Seok Na

IPC: G02F1/1343

CPC classification number: G02F1/1395 ,  G02F1/134363 ,  G02F1/136213 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2300/043 ,  G09G2300/0443 ,  G09G2300/0447

Abstract: A liquid crystal display includes first and second substrates, and a liquid crystal layer disposed therebetween. First and second gate lines are disposed on the first substrate. First and second data lines, and a power line are disposed on the first substrate. A first switching element is connected to the first gate line and the first data line, a second switching element is connected to the first gate line and the power line, a third switching element is connected to the second gate line and the second data line, a first pixel electrode is connected to the first switching element, a second pixel electrode is connected to the second switching element, a third pixel electrode is connected to the second switching element, and a fourth pixel electrode is connected to the third switching element, and a gate-on voltage can be simultaneously applied to the first and second gate lines.

Abstract translation: 液晶显示器包括第一和第二基板以及设置在其间的液晶层。 第一和第二栅极线设置在第一基板上。 第一和第二数据线，以及电源线设置在第一基板上。 第一开关元件连接到第一栅极线和第一数据线，第二开关元件连接到第一栅极线和电源线，第三开关元件连接到第二栅极线和第二数据线， 第一像素电极连接到第一开关元件，第二像素电极连接到第二开关元件，第三像素电极连接到第二开关元件，第四像素电极连接到第三开关元件，以及 栅极导通电压可以同时施加到第一和第二栅极线。

公开(公告)号：US07851835B2

公开(公告)日：2010-12-14

申请号：US11494257

申请日：2006-07-27

Applicant: Shin-Tack Kang ,  Dong-Hyeon Ki ,  Sung-Man Kim ,  Sang-Hoon Lee

Inventor： Shin-Tack Kang ,  Dong-Hyeon Ki ,  Sung-Man Kim ,  Sang-Hoon Lee

IPC: H01L31/062

CPC classification number: G02F1/136227 ,  G02F1/13458 ,  G02F2001/136236 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1288 ,  H01L29/41733

Abstract: A display substrate includes a substrate, a first insulating layer, an undercut compensating member, a first electrode, a second insulating layer and a first conductive pattern. The first insulating layer is formed on the substrate. The undercut compensating member is formed on the first insulating layer. The undercut compensating member has an etching rate smaller than that of the first insulating layer. The first electrode is formed on a portion of the undercut compensating member. The second insulating layer is formed on the first insulating layer. The second insulating layer has a contact hole through which a portion of the first electrode and a remaining portion of the undercut compensating member. The first conductive pattern electrically connected to the first electrode through the contact hole.

Abstract translation: 显示基板包括基板，第一绝缘层，底切补偿元件，第一电极，第二绝缘层和第一导电图案。 第一绝缘层形成在基板上。 底切补偿部件形成在第一绝缘层上。 底切补偿构件的蚀刻速率小于第一绝缘层的蚀刻速率。 第一电极形成在底切补偿部件的一部分上。 第二绝缘层形成在第一绝缘层上。 第二绝缘层具有接触孔，第一电极的一部分和底切补偿部件的剩余部分穿过该接触孔。 第一导电图案通过接触孔与第一电极电连接。

公开(公告)号：US20100090995A1

公开(公告)日：2010-04-15

申请号：US12577614

申请日：2009-10-12

Applicant: Chae-Woo CHUNG ,  Jae-Hyun Cho ,  Jeong-Uk Heo ,  Sun-Kyu Son ,  Dong-Hyeon Ki

Inventor： Chae-Woo CHUNG ,  Jae-Hyun Cho ,  Jeong-Uk Heo ,  Sun-Kyu Son ,  Dong-Hyeon Ki

IPC: G09G5/00 ,  G09G3/20

CPC classification number: G02F1/13336 ,  G02F1/1339 ,  G02F1/13452 ,  G02F2001/133317 ,  G02F2001/133322 ,  G02F2001/13398 ,  G02F2202/04 ,  H05K1/147

Abstract: A display apparatus and a multi-display apparatus having larger display areas. The display apparatus includes a first insulating substrate, as well as a plurality of gate lines and a plurality of data lines on the first insulating substrate, where the plurality of gate lines is arranged to intersect the plurality of data lines. A plurality of storage electrode lines is arranged substantially parallel to the plurality of gate lines. A gate drive chip is mounted off of the first insulating substrate and electrically connected to the plurality of gate lines and the plurality of storage electrode lines. The gate drive chip is configured to apply a gate voltage to the gate lines and a storage voltage to the storage electrode lines.

Abstract translation: 具有较大显示区域的显示装置和多显示装置。 显示装置包括第一绝缘基板，以及多个栅极线和在第一绝缘基板上的多条数据线，其中多条栅极线布置成与多条数据线相交。 多个存储电极线被布置成基本上平行于多条栅极线。 栅极驱动芯片安装在第一绝缘基板之外并电连接到多条栅极线和多条存储电极线。 栅极驱动芯片被配置为向栅极线施加栅极电压并将存储电压施加到存储电极线。

公开(公告)号：US20080068548A1

公开(公告)日：2008-03-20

申请号：US11855451

申请日：2007-09-14

Applicant: Ji-hyun Kwon ,  Won-hee Lee ,  Ho-kyoon Kwon ,  Byoung-sun Na ,  Dong-hyeon Ki ,  Soon-il Ahn

Inventor： Ji-hyun Kwon ,  Won-hee Lee ,  Ho-kyoon Kwon ,  Byoung-sun Na ,  Dong-hyeon Ki ,  Soon-il Ahn

IPC: G02F1/1337 ,  G02F1/1343

CPC classification number: G02F1/134336 ,  G02F2001/134318 ,  G02F2001/134345

Abstract: A liquid crystal display device includes a first insulating substrate, a gate line and a data line which are formed on the first insulating substrate and intersect each other insulatedly to define a pixel area. A pixel electrode is electrically coupled to the data line and includes a first stem electrode which is parallel with the data line, a plurality of first branch electrodes which are connected with the first stem electrode and substantially parallel with each other, and a first edge electrode which is located at a connecting area between the first stem electrode and the first branch electrode and extends to an area between the first branch electrodes. A second insulating substrate is provided which includes a common electrode formed on the second insulating substrate, the common electrode including a plurality of second branch electrodes which are located between the first branch electrodes. The second branch electrodes are substantially parallel with the first branch electrodes. A second stem electrode connects the plurality of second branch electrodes, and a second edge electrode is located at a connecting area between the second branch electrode and the second stem electrode, and the second edge electrode extending in an area between the second branch electrodes. A liquid crystal layer is disposed between the first insulating substrate and the second insulating substrate.

Abstract translation: 液晶显示装置包括第一绝缘基板，栅极线和数据线，其形成在第一绝缘基板上并彼此绝缘地彼此相交以限定像素区域。 像素电极电耦合到数据线，并且包括与数据线平行的第一杆电极，与第一杆电极连接并且基本上彼此平行的多个第一分支电极和第一边缘电极 其位于第一茎电极和第一分支电极之间的连接区域处并延伸到第一分支电极之间的区域。 提供了第二绝缘基板，其包括形成在第二绝缘基板上的公共电极，公共电极包括位于第一分支电极之间的多个第二分支电极。 第二分支电极与第一分支电极基本平行。 第二茎电极连接多个第二分支电极，第二边缘电极位于第二分支电极和第二茎电极之间的连接区域，第二边缘电极在第二分支电极之间的区域中延伸。 液晶层设置在第一绝缘基板和第二绝缘基板之间。

公开(公告)号：US20050208711A1

公开(公告)日：2005-09-22

申请号：US11126305

申请日：2005-05-11

Applicant: Woon-Yong Park ,  Hyeon-Hwan Kim ,  Dong-Hyeon Ki

Inventor： Woon-Yong Park ,  Hyeon-Hwan Kim ,  Dong-Hyeon Ki

IPC: G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  G09F9/00 ,  H01L21/336 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L29/66765 ,  G02F1/134363 ,  G02F1/13458 ,  G02F1/1368 ,  G02F2001/136231 ,  H01L27/12 ,  H01L29/78669

Abstract: A method for fabricating a thin film array substrate for a liquid crystal display includes steps of forming a gate line assembly and a common electrode line assembly on a first substrate. The gate line assembly includes a plurality of gate lines and gate pads, and the common electrode line assembly includes common signal lines and common electrodes. Thereafter, a gate insulating layer is formed on the first substrate, and a semiconductor pattern and an ohmic contact pattern are formed on the gate insulating layer. A data line assembly and pixel electrodes are then formed on the first substrate. The data line assembly includes a plurality of data lines, data pads, and source and drain electrodes. The pixel electrodes are connected to the drain electrodes while proceeding parallel to the common electrodes. A passivation layer is formed on the substrate. The passivation layer and the gate insulating layer are etched such that the gate pads and the data pads are exposed to the outside. At this time, the etching is performed after an assembly process where a second substrate is arranged to face the first substrate and assembled together and the passivation layer and the gate insulating layer are exposed outside of the second substrate.

Abstract translation: 制造液晶显示器用薄膜阵列基板的方法包括在第一基板上形成栅线组合体和公共电极线组合体的工序。 栅极线组件包括多个栅极线和栅极焊盘，并且公共电极线组件包括公共信号线和公共电极。 此后，在第一基板上形成栅极绝缘层，并且在栅极绝缘层上形成半导体图案和欧姆接触图案。 然后在第一基板上形成数据线组件和像素电极。 数据线组件包括多条数据线，数据焊盘以及源极和漏极。 像素电极在平行于公共电极的同时连接到漏电极。 在衬底上形成钝化层。 蚀刻钝化层和栅极绝缘层，使得栅极焊盘和数据焊盘暴露于外部。 此时，在将第二基板布置成面对第一基板并组装在一起并且钝化层和栅极绝缘层暴露在第二基板外部的组装工艺之后进行蚀刻。

公开(公告)号：US06876405B1

公开(公告)日：2005-04-05

申请号：US10626767

申请日：2003-07-25

Applicant: Woon-Yong Park ,  Hyeon-Hwan Kim ,  Dong-Hyeon Ki

Inventor： Woon-Yong Park ,  Hyeon-Hwan Kim ,  Dong-Hyeon Ki

IPC: G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/336 ,  H01L29/786 ,  G02F1/136

CPC classification number: H01L29/66765 ,  G02F1/134363 ,  G02F1/13458 ,  G02F1/1368 ,  G02F2001/136231 ,  H01L29/78669

Abstract: A method for fabricating a thin film array substrate for a liquid crystal display includes steps of forming a gate line assembly and a common electrode line assembly on a first substrate. The gate line assembly includes a plurality of gate lines and gate pads, and the common electrode line assembly includes common signal lines and common electrodes. Thereafter, a gate insulating layer is formed on the first substrate, and a semiconductor pattern and an ohmic contact pattern are formed on the gate insulating layer. A data line assembly and pixel electrodes are then formed on the first substrate. The data line assembly includes a plurality of data lines, data pads, and source and drain electrodes. The pixel electrodes are connected to the drain electrodes while proceeding parallel to the common electrodes. A passivation layer is formed on the substrate. The passivation layer and the gate insulating layer are etched such that the gate pads and the data pads are exposed to the outside. At this time, the etching is performed after an assembly process where a second substrate is arranged to face the first substrate and assembled together and the passivation layer and the gate insulating layer are exposed outside of the second substrate.

Abstract translation: 制造液晶显示器用薄膜阵列基板的方法包括在第一基板上形成栅线组合体和公共电极线组合体的工序。 栅极线组件包括多个栅极线和栅极焊盘，并且公共电极线组件包括公共信号线和公共电极。 此后，在第一基板上形成栅极绝缘层，并且在栅极绝缘层上形成半导体图案和欧姆接触图案。 然后在第一基板上形成数据线组件和像素电极。 数据线组件包括多条数据线，数据焊盘以及源极和漏极。 像素电极在平行于公共电极的同时连接到漏电极。 在衬底上形成钝化层。 蚀刻钝化层和栅极绝缘层，使得栅极焊盘和数据焊盘暴露于外部。 此时，在将第二基板布置成面对第一基板并组装在一起并且钝化层和栅极绝缘层暴露在第二基板外部的组装工艺之后进行蚀刻。

公开(公告)号：US09557839B2

公开(公告)日：2017-01-31

申请号：US13292224

申请日：2011-11-09

Applicant: Se Hyoung Cho ,  Dong-Hyeon Ki ,  Dong Gyu Kim

Inventor： Se Hyoung Cho ,  Dong-Hyeon Ki ,  Dong Gyu Kim

IPC: G06F3/041 ,  G06F3/044 ,  G09G3/3233 ,  G09G3/3258 ,  G09G3/20 ,  G09G3/32

CPC classification number: G06F3/0412 ,  G06F3/041 ,  G06F3/044 ,  G09G3/2003 ,  G09G3/3225 ,  G09G2230/00 ,  G09G2300/0426 ,  G09G2300/0465 ,  G09G2300/0861 ,  G09G2310/0245 ,  G09G2370/24

Abstract: The embodiments of the present invention relate to a display device and a driving method thereof, wherein the display device according to an exemplary embodiment of the present invention includes a plurality of pixels a voltage transmitting line transmitting a first voltage to a first pixel among the plurality of pixels, a data line transmitting a data voltage to the first pixel, and a plurality of sensing units including a first sensing unit connected to the voltage transmitting line, wherein the first pixel includes a first switching element including an input terminal connected to the voltage transmitting line and a second switching element including an input terminal connected to the data line, and the first sensing unit includes a control switching element including an input terminal connected to the voltage transmitting line.

Abstract translation: 本发明的实施例涉及一种显示装置及其驱动方法，其中根据本发明的示例性实施例的显示装置包括多个像素，电压传输线将第一电压发送到多个第一像素中的第一像素 的数据线，将数据电压发送到第一像素，以及多个感测单元，包括连接到电压传输线的第一感测单元，其中第一像素包括第一开关元件，第一开关元件包括连接到电压的输入端子 所述第二开关元件包括连接到所述数据线的输入端子，并且所述第一感测单元包括控制开关元件，所述控制开关元件包括连接到所述电压传输线的输入端子。