公开(公告)号：US07623054B2

公开(公告)日：2009-11-24

申请号：US11526636

申请日：2006-09-26

申请人： Masao Iriguchi ,  Hiroshi Tsuchi

发明人： Masao Iriguchi ,  Hiroshi Tsuchi

IPC分类号： H03M1/66

CPC分类号： H03F3/45183 ,  G09G3/3688 ,  G09G2310/027 ,  H03F2203/45616 ,  H03F2203/45631 ,  H03F2203/45656 ,  H03F2203/45682 ,  H03F2203/45728 ,  H03M1/765

摘要： Disclosed is a differential amplifier of a multi-level output type comprising a load circuit including a diode-connected first transistor with a source thereof connected to a power supply and a second transistor with a source thereof connected to the power supply and connected to a gate of the first transistor through a capacitor, a differential pair including a third transistor and a fourth transistor with sources thereof connected in common and drains thereof connected to drains of the first and second transistors, respectively, a current source for supplying a current to the differential pair, a first switch connected between a gate of the second transistor and a drain of the fourth transistor, an amplifier with an input thereof connected to a drain of the second transistor and an output thereof connected to an output terminal, a second switch connected between a gate of the fourth transistor and a first input terminal, a third switch connected between the gate of the fourth transistor and a third input terminal, a fourth switch connected between a gate of the third transistor and a second input terminal, and a fifth switch connected between the gate of the third transistor and the output terminal. Switching control between a first state where the first, second and fourth switches are turned on and the third and fifth switches are turned off and a second state where the first and second fourth switches are turned off and the third and fifth switches are turned on is performed.

摘要翻译： 公开了一种多电平输出型的差分放大器，包括负载电路，负载电路包括二极管连接的第一晶体管，其源极连接到电源，第二晶体管的源极连接到电源并连接到栅极 第一晶体管通过电容器，差分对包括第三晶体管和第四晶体管，其源极分别连接到第一和第二晶体管的漏极，电流源分别连接到第一和第二晶体管的漏极，电流源用于向差分 连接在第二晶体管的栅极和第四晶体管的漏极之间的第一开关，放大器，其输入连接到第二晶体管的漏极，其输出连接到输出端子，第二开关连接在 第四晶体管的栅极和第一输入端子，连接在第四晶体管的栅极之间的第三开关 tor和第三输入端，连接在第三晶体管的栅极和第二输入端之间的第四开关，以及连接在第三晶体管的栅极和输出端之间的第五开关。 在第一，第二和第四开关导通的第一状态和第三和第五开关之间的开关控制被关断，而第一和第二第四开关被断开，第三和第五开关导通的第二状态是 执行。

公开(公告)号：US07619445B2

公开(公告)日：2009-11-17

申请号：US12166098

申请日：2008-07-01

申请人： Hiroshi Tsuchi

发明人： Hiroshi Tsuchi

IPC分类号： H03K19/0175

CPC分类号： G09G3/3685 ,  G09G2310/027 ,  G09G2310/0291 ,  H03M1/0682 ,  H03M1/765

摘要： A differential amplifier includes a first differential pair, a second differential pair, a load circuit, connected in common to the first and second differential pairs, and first and second current sources for supplying the current to the first and second differential pairs, and amplifies a signal responsive to a common output signal of the first and second differential pairs. One of differential inputs of the first differential pair is connected to a reference voltage. A data output period includes a first period and a second period. During the first period, voltages of first and second input terminals are input through first and fourth switches in the on-state to differential inputs of the second differential pair. The other of the differential inputs of the first differential pair is connected through a third switch in the on-state to an output terminal. An output voltage is stored in a capacitor C connected to the other differential input of the first differential pair. The first, third and fourth switches are turned off during the second period. One of the differential inputs of the second differential pair is connected through a second switch to the output terminal. The other differential input of the second differential pair is connected through a fifth switch to a third input terminal.

摘要翻译： 差分放大器包括第一差分对，第二差分对，负载电路，共同连接到第一和第二差分对，以及第一和第二电流源，用于将电流提供给第一和第二差分对，并且放大一个 响应于第一和第二差分对的公共输出信号的信号。 第一差分对的差分输入之一连接到参考电压。 数据输出周期包括第一周期和第二周期。 在第一时段期间，第一和第二输入端的电压通过导通状态的第一和第四开关输入到第二差分对的差分输入。 第一差分对的另一个差分输入通过导通状态的第三开关连接到输出端。 输出电压存储在连接到第一差分对的另一个差分输入的电容器C中。 在第二时段期间，第一，第三和第四开关被关断。 第二差分对的差分输入之一通过第二开关连接到输出端。 第二差分对的另一差分输入通过第五开关连接到第三输入端。

公开(公告)号：US20090244056A1

公开(公告)日：2009-10-01

申请号：US12385080

申请日：2009-03-30

申请人： Hiroshi TSUCHI

发明人： Hiroshi TSUCHI

IPC分类号： G09G5/00 ,  H03F3/45

CPC分类号： G09G3/3688 ,  G09G3/3614 ,  G09G2310/0291

摘要： Disclosed is an output amplifier circuit including a differential stage, a first output stage that receives outputs of the differential stage, and a second output stage having an output thereof electrically connected to a load. The differential stage receives an input signal at a non-inverting input thereof. In the first connection configuration, an output of the first output stage is electrically disconnected from the output of the second output stage, outputs of the differential stage are electrically disconnected from inputs of the second output stage, and a second input of the differential stage is electrically connected to the output of the first output stage. In the second connection configuration, the output of the first output stage is electrically connected to the output of the second output stage, and the outputs of the differential stage is electrically connected to the inputs of the second output stage.

摘要翻译： 公开了一种输出放大器电路，其包括差分级，接收差分级的输出的第一输出级和具有电连接到负载的输出的第二输出级。 差分级在其非反相输入端接收输入信号。 在第一连接结构中，第一输出级的输出与第二输出级的输出电断开，差动级的输出与第二输出级的输入电断开，差动级的第二输入为 电连接到第一输出级的输出端。 在第二连接结构中，第一输出级的输出电连接到第二输出级的输出，差分级的输出电连接到第二输出级的输入。

公开(公告)号：US07586504B2

公开(公告)日：2009-09-08

申请号：US11294605

申请日：2005-12-06

申请人： Yoshihiko Nakahira ,  Hiroshi Tsuchi

发明人： Yoshihiko Nakahira ,  Hiroshi Tsuchi

IPC分类号： G09G3/36 ,  G09G5/10

CPC分类号： G09G3/3696 ,  G09G3/3208 ,  G09G3/3225 ,  G09G3/3291 ,  G09G3/3648 ,  G09G2300/0842 ,  H03F3/45753 ,  H03F3/45977

摘要： To obtain an amplifier circuit capable of realizing low power consumption and high-precision output. A controlling unit controls each switch of an offset correction circuit to select one capacitor associated with a voltage level of an input signal selected by an input signal selection unit, have an offset voltage of an operational amplifier generated according to the voltage level of the input signal stored by the selected capacitor, and correct an output of the operational amplifier by using the offset voltage held by the selected capacitor.

摘要翻译： 获得能够实现低功耗和高精度输出的放大器电路。 控制单元控制偏移校正电路的每个开关以选择与由输入信号选择单元选择的输入信号的电压电平相关联的一个电容器，具有根据输入信号的电压电平产生的运算放大器的偏移电压 由所选择的电容器存储，并且通过使用由所选择的电容器保持的偏移电压来校正运算放大器的输出。

公开(公告)号：US20090213051A1

公开(公告)日：2009-08-27

申请号：US12320831

申请日：2009-02-05

申请人： Hiroshi Tsuchi

发明人： Hiroshi Tsuchi

IPC分类号： G09G3/36 ,  H03M1/66

CPC分类号： H03M1/661 ,  G09G3/3648 ,  G09G3/3685 ,  H03M1/76

摘要： Disclosed is a digital-to-analog converting circuit (DAC) which in accordance with an m-bit digital signal, selects two reference voltages, inclusive of redundant selection of the same reference voltage (inclusive also of reference voltages other than adjacent voltages) out of a plurality of reference voltages and outputs a voltage level that is the result of interpolation from the two reference voltages. The plurality of reference voltages are grouped into first to (3S+1)th reference voltage groups (where S is an integer that is a power of 2). An ith reference voltage group [where i is 1 to (3S+1)] includes [3S×(j−1)+i]th reference voltages (where j=1, 2, . . . h, and h is a prescribed integer). The DAC has a decoder and an interpolation amplifier. The decoder includes first to (3S+1)th subdecoders provided in correspondence with the first to (3S+1)th reference voltage groups for selecting one reference voltage out of the plurality of reference voltages of respective ones of the corresponding reference voltage groups in accordance with values of a first bit group on a higher order side of the input digital signal; and a (3S+1)-input and 2-output subdecoder for selecting two reference voltages, inclusive of redundant selection of the same reference voltage, out of (3S+1) reference voltages selected by the respective first to (3S+1)th subdecoders, in accordance with values of a second bit group on a lower order side of the input digital signal, and outputting the selected two reference voltages. The interpolation amplifier outputs a voltage level obtained by interpolating the two reference voltages with an interpolation ratio 1:1.

摘要翻译： 公开了一种数模转换电路（DAC），其根据m位数字信号选择两个参考电压，包括相同参考电压（包括除了相邻电压以外的参考电压）的冗余选择 的多个参考电压，并且从两个参考电压输出作为内插结果的电压电平。 多个参考电压被分组为第一到第（3S + 1）个参考电压组（其中S是2的幂的整数）。 第i参考电压组[其中i为1至（3S + 1）]包括[3Sx（j-1）+ i]个参考电压（其中j = 1,2，...，h，h为规定的整数 ）。 DAC具有解码器和内插放大器。 解码器包括与第一至第（3S + 1）个参考电压组相对应地设置的第一至第（3S + 1）个子代码器，用于从相应的参考电压组中的相应参考电压组的多个参考电压中选择一个参考电压 根据输入数字信号的高阶侧的第一位组的值; 和（3S + 1）输入和2输出子编码器，用于选择两个参考电压，包括相同参考电压的冗余选择，由（3S + 1）个参考电压分别由第一至第（3S + 1） 根据输入数字信号的低级侧上的第二位组的值，并输出所选择的两个参考电压。 内插放大器以插值比1：1输出通过内插两个参考电压而获得的电压电平。

公开(公告)号：US20090195291A1

公开(公告)日：2009-08-06

申请号：US12320778

申请日：2009-02-04

申请人： Hiroshi Tsuchi

发明人： Hiroshi Tsuchi

IPC分类号： H03L5/00

CPC分类号： H03K19/018521 ,  G09G3/20 ,  G09G3/3208 ,  G09G3/3611 ,  G09G2310/0289 ,  H03K19/0013 ,  H03K19/01707

摘要： Disclosed is a level shift circuit that includes a first level shifter which is connected between an output terminal and a first power supply terminal that supplies a first voltage and sets the output terminal to a level of the first voltage when an input signal received at an input terminal assumes a first value; a second level shifter which is connected between the output terminal and a second power supply terminal that supplies a second voltage and sets the output terminal to a level of the second voltage when the input signal assumes a complementary value of the first value; and a feedback control unit that performs control of deactivating the first level shifter during a predetermined time interval including a point of time when the input signal is supplied when it is detected that the output terminal immediately before the input signal is received at the input terminal assumes the first voltage level. When the input signal supplied in the predetermined time interval assumes a value that sets the output terminal to the second voltage level, the second level shifter sets the output terminal to the second voltage level with the first level shifter deactivated.

摘要翻译： 公开了一种电平移位电路，其包括第一电平移位器，其连接在输出端子和提供第一电压的第一电源端子之间，并且当在输入端接收的输入信号时将输出端子设置为第一电压的电平 终端假设第一个值; 第二电平移位器，连接在输出端和提供第二电压的第二电源端之间，当输入信号呈现第一值的互补值时，将输出端设置为第二电压的电平; 以及反馈控制单元，其在包括当检测到在输入端子处接收到输入信号之前的输出端子被假定时提供输入信号的时间点的预定时间间隔期间，执行停用第一电平移位器的控制， 第一个电压电平。 当在预定时间间隔内提供的输入信号采取将输出端子设置为第二电压电平的值时，第二电平移位器将第一电平移位器的输出端子设置为第二电压电平。

公开(公告)号：US07495512B2

公开(公告)日：2009-02-24

申请号：US11638535

申请日：2006-12-14

申请人： Hiroshi Tsuchi

发明人： Hiroshi Tsuchi

IPC分类号： H03F3/45 ,  G09G5/10

CPC分类号： H03F3/45192 ,  H03F3/3022 ,  H03F3/45179 ,  H03F2203/45116 ,  H03F2203/45166 ,  H03F2203/45171 ,  H03F2203/45236 ,  H03F2203/45281 ,  H03F2203/45641

摘要： A differential amplifying circuit capable of reducing amplitude-difference deviation over a full range of grayscale voltages inclusive of voltages in the vicinity of power-supply voltage includes first and second differential pairs of mutually different polarities, in which the outputs of the differential pairs are coupled by a coupling stage. One of the first and second differential pairs receives an input signal from an input terminal and a feedback signal from an output terminal at a pair of inputs thereof, and the other differential pair receives reference signals (which may be of the same voltage), which have voltage levels that set the other differential pair transistors to an on-state, at a pair of inputs of the other differential pair.

摘要翻译： 能够减小包括电源电压附近的电压的全范围灰度级电压的差分偏差的差分放大电路包括相互不同极性的第一和第二差分对，其中差分对的输出耦合 通过耦合阶段。 第一和第二差分对之一接收来自输入端的输入信号和来自其输入端的输出端的反馈信号，另一个差分对接收参考信号（其可以是相同的电压），其中 具有在另一个差分对的一对输入处将另一个差分对晶体管设置为导通状态的电压电平。

公开(公告)号：US20080143658A1

公开(公告)日：2008-06-19

申请号：US11979714

申请日：2007-11-07

申请人： Junichiro Ishii ,  Hiroshi Tsuchi

发明人： Junichiro Ishii ,  Hiroshi Tsuchi

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/2011 ,  G09G2310/027 ,  Y10T307/74 ,  Y10T307/747

摘要： Disclosed is an output circuit including a connection switch and an operation unit. The connection switch receives first and second voltages from first and second terminals, respectively, selects and outputs the first voltage or the second voltage for first to third intermediate terminals, including selection of the same voltage and switches assignment of the first and second voltages to the first to third intermediate terminals responsive to a connection switching signal. The operation unit receives the voltages assigned to the first to third intermediate terminals and outputs to an output terminal a voltage obtained by performing a predetermined operation on the voltages.

摘要翻译： 公开了一种包括连接开关和操作单元的输出电路。 连接开关分别接收来自第一和第二端子的第一和第二电压，选择并输出第一至第三中间端子的第一电压或第二电压，包括选择相同的电压，并将第一和第二电压的分配切换到 响应于连接切换信号的第一到第三中间终端。 操作单元接收分配给第一至第三中间端子的电压，并向输出端子输出通过对电压执行预定操作而获得的电压。

公开(公告)号：US07342449B2

公开(公告)日：2008-03-11

申请号：US11197635

申请日：2005-08-04

申请人： Jun-ichirou Ishii ,  Hiroshi Tsuchi

发明人： Jun-ichirou Ishii ,  Hiroshi Tsuchi

IPC分类号： H03F3/45

CPC分类号： H03F3/45179 ,  H03F3/72

摘要： Disclosed is a Rail-to-Rail amplifier including a plurality of differential pairs of a first conductivity type and a plurality of differential amplifiers of a second conductivity type each with one of an input pair thereof constituting an input terminal, a differential amplifier that outputs an output voltage according to the range of provided supply voltage, a determination unit for determining whether to stop operations of the differential pairs of the first conductivity type or the second conductivity type according to a predetermined input signal, and a differential pair control unit for stopping the operations of the differential pairs of the first conductivity type or the second conductivity type according to the output signal of the determination unit.

摘要翻译： 公开了一种轨至轨放大器，其包括多个第一导电类型的差分对和多个第二导电类型的差分放大器，每个差分放大器的输入对之一构成输入端，差分放大器输出 根据提供的电源电压的范围的输出电压;确定单元，用于根据预定输入信号确定是否停止第一导电类型或第二导电类型的差分对的操作;以及差分对控制单元，用于停止 根据确定单元的输出信号对第一导电类型或第二导电类型的差分对进行操作。

公开(公告)号：US07339422B2

公开(公告)日：2008-03-04

申请号：US11093099

申请日：2005-03-29

申请人： Hiroshi Tsuchi

发明人： Hiroshi Tsuchi

IPC分类号： H03F1/02

CPC分类号： H03F3/45753 ,  H03F3/45183 ,  H03F3/45744

摘要： Offset canceling amplifier circuit in which a high accuracy of output with a suppressed output offset is achieved and a variation in a slew rate is also suppressed, and a display device having the amplifier circuit. A first differential pair (M5, M6) connected between a first current source (M9) and a common load circuit (M1, M2) and a second differential pair (M3, M4) connected between a second current source (M8) between the common load circuit (M1, M2) are provided. A switch (SW1) connected between one input of the first differential pair (M5, M6) and an input terminal (1), a switch (SW2) connected between the one input of the differential pair (M5, M6) and an output terminal (2), a switch (SW3) connected between one input of the second differential pair (M3, M4) and the output terminal (2), and a capacitance element (C1) connected to the one input of the second differential pair (M3, M4) are provided. The other input of the first differential pair (M5, M6) is connected to the input terminal (1), and the other input of the second differential pair (M3, M4) is connected to a reference voltage input terminal (3). An amplifying operation by an amplifying element (M7) is performed responsive to a common output signal of the two differential pairs, and circuits (SW11, SW12) for controlling activation or deactivation of at least one of the first and second current sources are provided.

摘要翻译： 具有抑制输出偏移的输出的高精度和压摆率的变化也被抑制的偏移消除放大器电路和具有放大器电路的显示装置。 连接在第一电流源（M 9）和公共负载电路（M 1，M 2）之间的第一差分对（M 5，M 6）和连接在第二电流 提供公共负载电路（M 1，M 2）之间的源极（M 8）。 连接在第一差分对（M 5，M 6）的一个输入端和输入端子（1）之间的开关（SW 1），连接在差动对的一个输入端（M 5，M 6）和输出端子（2），连接在第二差分对（M 3，M 4）的一个输入端和输出端子（2）之间的开关（SW 3）和连接到 提供第二差分对（M 3，M 4）的一个输入。 第一差分对（M 5，M 6）的另一个输入端连接到输入端子（1），第二差分对（M 3，M 4）的另一个输入端连接到基准电压输入端子 3）。 响应于两个差分对的公共输出信号执行放大元件（M7）的放大操作，以及用于控制第一和第二电流源中的至少一个的激活或去激活的电路（SW11，SW12） 被提供。