公开(公告)号：US20050168254A1

公开(公告)日：2005-08-04

申请号：US10710894

申请日：2004-08-11

Applicant: Kuen-Suey Hou ,  Jin-Bin Yang

Inventor： Kuen-Suey Hou ,  Jin-Bin Yang

IPC: G11B5/09 ,  G11B20/14 ,  H03L7/085 ,  H03L7/087 ,  H03L7/113

CPC classification number: H03L7/113 ,  G11B20/1403 ,  H03L7/087

Abstract: A phase locked loop (PLL) generates a phase locked signal and adjusts a frequency of the phase locked signal according to an incoming signal. The PLL includes an oscillator for generating the phased locked signal and a frequency detection module electrically coupled to the oscillator. The frequency detection module includes a pattern detector for detecting the two regular patterns in the incoming signal, a counter electrically coupled to the pattern detector for calculating the number of periods of the phase locked signal corresponding to the distance between the two regular patterns, and a comparator electrically coupled to the counter for comparing the number of periods with a predetermined value to generate a control signal, and using the control signal to control the oscillator to adjust the frequency of the phase locked loop signal.

Abstract translation: 锁相环（PLL）产生锁相信号，根据输入信号调节锁相信号的频率。 PLL包括用于产生相位锁定信号的振荡器和电耦合到振荡器的频率检测模块。 频率检测模块包括用于检测输入信号中的两个规则图案的模式检测器，电耦合到模式检测器的计数器，用于计算对应于两个规则模式之间的距离的锁相信号的周期数，以及 比较器电耦合到计数器，用于比较具有预定值的周期数以产生控制信号，并且使用控制信号来控制振荡器来调节锁相环信号的频率。

公开(公告)号：US09171639B2

公开(公告)日：2015-10-27

申请号：US13397989

申请日：2012-02-16

Applicant: Rei-Fu Huang ,  Jin-Bin Yang

Inventor： Rei-Fu Huang ,  Jin-Bin Yang

IPC: G01R31/02 ,  G11C17/18 ,  H01L23/525

CPC classification number: G11C17/18 ,  H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An eFuse with at least one fuse unit is provided. The fuse unit includes a first common node providing a first reference voltage, a second common node providing a second reference voltage, at least one fuse coupled to the first common node, and a determining unit coupled between the fuse and the second common node, generating an output signal indicating whether the fuse is blown or not according to a first condition in a normal mode and a second condition in a test mode.

Abstract translation: 提供至少一个保险丝单元的eFuse。 保险丝单元包括提供第一参考电压的第一公共节点，提供第二参考电压的第二公共节点，耦合到第一公共节点的至少一个熔丝以及耦合在熔丝和第二公共节点之间的确定单元，产生 根据正常模式中的第一状态和测试模式中的第二状态，指示熔丝是否熔断的输出信号。

公开(公告)号：US20130099835A1

公开(公告)日：2013-04-25

申请号：US13280341

申请日：2011-10-25

Applicant: You-Wen Chang ,  Yi-Sung Chan ,  Jin-Bin Yang ,  Chang-Po Ma

Inventor： You-Wen Chang ,  Yi-Sung Chan ,  Jin-Bin Yang ,  Chang-Po Ma

IPC: H03L7/00

CPC classification number: G11B7/126 ,  G11B20/10222 ,  G11B2220/2537 ,  H03K5/26

Abstract: An exemplary calibration apparatus includes a detecting circuit and a calibrating circuit. The detecting circuit is arranged for generating a detection result by detecting relationship between edges of a plurality of signals generated from a plurality of signal sources, wherein at least one of the edges is a falling edge. The calibrating circuit is coupled to the detecting circuit, and arranged for calibrating at least one of the signal sources according to the detection result. An exemplary calibration method includes the following steps: generating a detection result by detecting relationship between edges of a plurality of signals generated from a plurality of signal sources, wherein at least one of the edges is a falling edge; and calibrating at least one of the signal sources according to the detection result.

Abstract translation: 示例性的校准装置包括检测电路和校准电路。 检测电路被布置成通过检测从多个信号源产生的多个信号的边缘之间的关系来产生检测结果，其中至少一个边缘是下降沿。 校准电路耦合到检测电路，并被安排用于根据检测结果校准至少一个信号源。 示例性校准方法包括以下步骤：通过检测从多个信号源产生的多个信号的边缘之间的关系来产生检测结果，其中至少一个边缘是下降沿; 并根据检测结果校准至少一个信号源。

公开(公告)号：US20110246138A1

公开(公告)日：2011-10-06

申请号：US12912732

申请日：2010-10-26

Applicant: Yi-Jen Chung ,  Chi-Pei Huang ,  Ching-Ning Chiu ,  Jin-Bin Yang

Inventor： Yi-Jen Chung ,  Chi-Pei Huang ,  Ching-Ning Chiu ,  Jin-Bin Yang

IPC: G06F11/30 ,  G06F15/00

CPC classification number: G06F13/4072

Abstract: A hardware status detecting circuit for detecting a hardware status of a target apparatus includes a plurality of hardware status detectors operating in response to the hardware status of the target apparatus, and a signal processing unit coupled to the hardware status detectors for generating a hardware status detecting signal having information of operational statuses of the hardware status detectors embedded therein.

Abstract translation: 用于检测目标设备的硬件状态的硬件状态检测电路包括响应于目标设备的硬件状态操作的多个硬件状态检测器，以及耦合到硬件状态检测器的信号处理单元，用于产生硬件状态检测 信号，其具有嵌入其中的硬件状态检测器的操作状态信息。

公开(公告)号：US07885154B2

公开(公告)日：2011-02-08

申请号：US11366476

申请日：2006-03-03

Applicant: Jin-Bin Yang ,  Meng-Ta Yang

Inventor： Jin-Bin Yang ,  Meng-Ta Yang

IPC: G11B7/00

CPC classification number: G11B20/10009 ,  G11B20/10027

Abstract: An apparatus for controlling discrete data in a disk overwrite area or a power calibration area comprises a signal-processing unit, an address-processing unit, a control signal-processing unit, a clock recovery circuit, a signal-processing unit parameter control unit, and a clock recovery circuit parameter control unit, wherein the control signal-processing unit uses a message produced by a data on the disc to determine the control signals such as hold, load, or increasing bandwidth for holding, loading, and increasing the bandwidth of the parameters for processing the related circuits (such as the circuit of the signal-processing unit or the clock recovery circuit) of the discrete data produced between the two data clusters, so as to increase the convergent speed of the circuits for assuring the accuracy of reading data.

Abstract translation: 用于控制盘重写区域或功率校准区域中的离散数据的装置包括信号处理单元，地址处理单元，控制信号处理单元，时钟恢复电路，信号处理单元参数控制单元， 以及时钟恢复电路参数控制单元，其中控制信号处理单元使用由盘上的数据产生的消息来确定诸如保持，加载或增加用于保持，加载和增加带宽的带宽的控制信号 用于处理在两个数据簇之间产生的离散数据的相关电路（例如信号处理单元或时钟恢复电路的电路）的参数，以便增加电路的收敛速度以确保准确度 阅读数据。

公开(公告)号：US07623421B2

公开(公告)日：2009-11-24

申请号：US11554474

申请日：2006-10-30

Applicant: Yu-hsuan Lin ,  Jin-bin Yang ,  Ching-ning Chiu

Inventor： Yu-hsuan Lin ,  Jin-bin Yang ,  Ching-ning Chiu

IPC: G11B7/00

CPC classification number: G11B20/1217 ,  G11B2020/10944 ,  G11B2020/1221 ,  G11B2020/1267 ,  G11B2020/1277 ,  G11B2020/1287 ,  G11B2020/1295 ,  G11B2220/2537 ,  G11B2220/2541 ,  G11B2220/2579

Abstract: Disclosed is a data search system for searching the data sync pattern by using a physical address or by detecting the falling edge of the blank area end. The data search system comprises a first data start indicator, a second data start indicator, a decision circuit, a window generator and a data sync pattern search circuit. The first data start indicator generates a first start search signal indicating a first start position. The second data start indicator generates a second start search signal indicating a second start position. The decision circuit selects to output one of the start search signals. The window generator generates a window interval starting from the start position. The data sync pattern search circuit searches a data sync pattern of the data in the window interval to determine the data following the data sync pattern.

Abstract translation: 公开了一种用于通过使用物理地址或通过检测空白区域结束的下降沿来搜索数据同步模式的数据搜索系统。 数据搜索系统包括第一数据开始指示符，第二数据开始指示符，判定电路，窗口生成器和数据同步模式搜索电路。 第一数据开始指示器产生指示第一开始位置的第一开始搜索信号。 第二数据开始指示器产生指示第二开始位置的第二开始搜索信号。 决定电路选择输出开始搜索信号之一。 窗口生成器从起始位置生成窗口间隔。 数据同步模式搜索电路在窗口间隔中搜索数据的数据同步模式，以确定数据同步模式之后的数据。

公开(公告)号：US20090265521A1

公开(公告)日：2009-10-22

申请号：US12105743

申请日：2008-04-18

Applicant: Yu-hsuan Lin ,  Jin-bin Yang ,  Shu-hung Chou

Inventor： Yu-hsuan Lin ,  Jin-bin Yang ,  Shu-hung Chou

IPC: G06F12/16

CPC classification number: G11B27/24 ,  G11B20/1217 ,  G11B2020/1274 ,  G11B2220/215 ,  G11B2220/2562

Abstract: The present invention discloses an address protection method and circuit capable of efficiently protecting inputting addresses from corruption. The predictable order of a series of original addresses is checked and then the correct addresses are generated by correcting the corrupted addresses within the original addresses. The address protection method and circuit according to the present invention can improve the accuracy of the inputting addresses and increase the validity of data in response to the inputting addresses.

Abstract translation: 本发明公开了一种能够有效地保护输入地址免受损坏的地址保护方法和电路。 检查一系列原始地址的可预测顺序，然后通过校正原始地址中的损坏的地址来生成正确的地址。 根据本发明的地址保护方法和电路可以提高输入地址的精度，并且响应于输入地址增加数据的有效性。

公开(公告)号：US07567054B2

公开(公告)日：2009-07-28

申请号：US11307962

申请日：2006-03-01

Applicant: Yu-Hsuan Lin ,  Jin-Bin Yang ,  Chih-Ching Chen ,  Gwo-Huei Wu

Inventor： Yu-Hsuan Lin ,  Jin-Bin Yang ,  Chih-Ching Chen ,  Gwo-Huei Wu

IPC: H02P27/04

CPC classification number: G11B19/24 ,  H02P6/08

Abstract: A control circuit and a control method of controlling a rotation frequency of a spindle in an optical disc drive, the control circuit comprising: a spindle controller, electrically coupled to the spindle, for driving the spindle to rotate an optical disc according to a rotation control signal; a detector, electrically coupled to the spindle controller, for detecting the rotation frequency and for generating detecting signals; a frequency-adjusting module, electrically coupled to the detector, for adjusting at least one of the detecting signals to reduce a rotation frequency difference between detecting signals; a signal selector, electrically coupled to the frequency-adjusting module, for receiving output signals generated from the frequency-adjusting module and then outputting the rotation control signal.

Abstract translation: 一种控制电路和控制光盘驱动器中主轴的旋转频率的控制方法，所述控制电路包括：主轴控制器，其电耦合到所述主轴，用于驱动所述主轴以根据旋转控制旋转光盘 信号; 电耦合到主轴控制器的检测器，用于检测旋转频率并产生检测信号; 频率调节模块，电耦合到所述检测器，用于调整所述检测信号中的至少一个以减小检测信号之间的旋转频率差; 电耦合到频率调节模块的信号选择器，用于接收从频率调节模块产生的输出信号，然后输出旋转控制信号。

公开(公告)号：US20070205737A1

公开(公告)日：2007-09-06

申请号：US11307962

申请日：2006-03-01

Applicant: Yu-Hsuan Lin ,  Jin-Bin Yang ,  Chih-Ching Chen ,  Gwo-Huei Wu

Inventor： Yu-Hsuan Lin ,  Jin-Bin Yang ,  Chih-Ching Chen ,  Gwo-Huei Wu

IPC: G05B19/10

CPC classification number: G11B19/24 ,  H02P6/08

Abstract: A control circuit and a control method of controlling a rotation frequency of a spindle in an optical disc drive, the control circuit comprising: a spindle controller, electrically coupled to the spindle, for driving the spindle to rotate an optical disc according to a rotation control signal; a detector, electrically coupled to the spindle controller, for detecting the rotation frequency and for generating detecting signals; a frequency-adjusting module, electrically coupled to the detector, for adjusting at least one of the detecting signals to reduce a rotation frequency difference between detecting signals; a signal selector, electrically coupled to the frequency-adjusting module, for receiving output signals generated from the frequency-adjusting module and then outputting the rotation control signal.

Abstract translation: 一种控制电路和控制光盘驱动器中主轴的旋转频率的控制方法，所述控制电路包括：主轴控制器，其电耦合到所述主轴，用于驱动所述主轴以根据旋转控制旋转光盘 信号; 电耦合到主轴控制器的检测器，用于检测旋转频率并产生检测信号; 频率调节模块，电耦合到所述检测器，用于调整所述检测信号中的至少一个以减小检测信号之间的旋转频率差; 电耦合到频率调节模块的信号选择器，用于接收从频率调节模块产生的输出信号，然后输出旋转控制信号。

公开(公告)号：US20070140082A1

公开(公告)日：2007-06-21

申请号：US11554474

申请日：2006-10-30

Applicant: Yu-hsuan Lin ,  Jin-bin Yang ,  Ching-ning Chiu

Inventor： Yu-hsuan Lin ,  Jin-bin Yang ,  Ching-ning Chiu

IPC: G11B20/00

CPC classification number: G11B20/1217 ,  G11B2020/10944 ,  G11B2020/1221 ,  G11B2020/1267 ,  G11B2020/1277 ,  G11B2020/1287 ,  G11B2020/1295 ,  G11B2220/2537 ,  G11B2220/2541 ,  G11B2220/2579

Abstract: Disclosed is a data search system for searching the data sync pattern by using a physical address or by detecting the falling edge of the blank area end. The data search system comprises a first data start indicator, a second data start indicator, a decision circuit, a window generator and a data sync pattern search circuit. The first data start indicator generates a first start search signal indicating a first start position. The second data start indicator generates a second start search signal indicating a second start position. The decision circuit selects to output one of the start search signals. The window generator generates a window interval starting from the start position. The data sync pattern search circuit searches a data sync pattern of the data in the window interval to determine the data following the data sync pattern.

Abstract translation: 公开了一种用于通过使用物理地址或通过检测空白区域结束的下降沿来搜索数据同步模式的数据搜索系统。 数据搜索系统包括第一数据开始指示符，第二数据开始指示符，判定电路，窗口生成器和数据同步模式搜索电路。 第一数据开始指示器产生指示第一开始位置的第一开始搜索信号。 第二数据开始指示器产生指示第二开始位置的第二开始搜索信号。 决定电路选择输出开始搜索信号之一。 窗口生成器从起始位置生成窗口间隔。 数据同步模式搜索电路在窗口间隔中搜索数据的数据同步模式，以确定数据同步模式之后的数据。