Abstract:
Disclosed is a lateral flow quantitative assay method which can measure one or more analyte species at the same time, with high sensitivity. Also, the present invention relates to a strip which can measure one or more analyte species at the same time, with high sensitivity and a package in which the strip is integrated with a laser-induced surface fluorescence detector. The present invention can quantify multiple analytes with a minimum detection limit of pg/ml. Therefore, the present invention provides an advantage capable of quantifying a plurality of analytes at the same time using a simple lateral flow assay strip.
Abstract:
Disclosed is a lateral flow quantitative assay method which can measure one or more analyte species at the same time, with high sensitivity. Also, the present invention relates to a strip which can measure one or more analyte species at the same time, with high sensitivity and a package in which the strip is integrated with a laser-induced surface fluorescence detector. The present invention can quantify multiple analytes with a minimum detection limit of pg/ml. Therefore, the present invention provides an advantage capable of quantifying a plurality of analytes at the same time using a simple lateral flow assay strip.
Abstract:
A container receives lamps each having a lamp tube and a conductive member. The container includes a container body exposing the lamp tube and covering the conductive member, and a clip type power-supply unit holding the conductive member in a clip-coupling manner so that the container securely receives the lamps. The clip type power-supply unit supplies power to the conductive member. The clip type power-supply unit has a conductive base body coupled to the container body, a clip body protruded perpendicularly from the conductive base body, and a clip section protruded from the clip body to grip the conductive member. The container also has a shock absorbing member disposed between the container body and the clip type power-supply unit.
Abstract:
A multi-level EEPROM cell and a method of manufacture thereof are provided so as to improve a program characteristic of the multi-level cell. For the purpose, the multi-level flash EEPROM cell includes a floating gate formed as being electrically separated from a silicon substrate by an underlying tunnel oxide layer, a first dielectric layer formed over the top of the floating gate, a first control gate formed on the floating gate as being electrically separated from the floating gate by the first dielectric layer, a second dielectric layer formed on the sidewall and top of the first control gate, a second control gate formed on the sidewall and top of the first control gate as being electrically separated from the first control gate by the second dielectric layer, and a source and drain formed in the substrate as being self-aligned with both edges of the second control gate.
Abstract:
The present invention relates to a method of manufacturing a flash memory device. According to the present invention, a dielectric film is formed and an amorphous silicon layer is then formed to mitigate a topology generated by patterning of a first polysilicon layer in a cell region. The amorphous silicon layer serves as a protection layer of the dielectric film in the cell region when a gate oxide film in a peripheral circuit region is formed. Therefore, the present invention can not only improve the resistance of a word line in the cell region but also improve the film quality of the dielectric film and the gate oxide film in the peripheral circuit region.
Abstract:
The present invention relates to a method of forming a gate in a stack gate flash EEPROM cell. In order to preventing a lateral bird's beak from occurring in an ONO dielectric layer during a reoxidation process to be performed after a formation of a cell gate having a stack structure formed by stacking a floating gate, an ONO dielectric layer and a control gate, an oxide layer and a nitride layer are sequentially formed on an entire structure before the reoxidation and after a formation of the cell gate. The oxide layer serves to reduce a stress in depositing the nitride layer, and the nitride layer serves to prevent an occurrence of the lateral bird's beak of the ONO dielectric layer during the reoxidation process. Accordingly, the present invention prevents the lateral bird's beak of the ONO dielectric layer, thereby improving a speed of cell erase operation.
Abstract:
A semiconductor memory device includes a plurality of memory cells, including an N well formed within a P type region and a P well formed within the N well, a peripheral circuit configured to perform a program, program verify, read, erase, or erase verify operation on memory cells selected from among the memory cells, a voltage supply circuit configured to generate a positive voltage and a negative voltage for the program, program verify, read, erase, or erase verify operation, and a control circuit configured to control the peripheral circuit and the voltage supply circuit so that the program, program verify, read, erase, or erase verify operation is performed and, when the program verify and read operations are performed, different voltage is supplied to the P well and the N well.
Abstract:
A backlight assembly has a lamp driving device for driving external electrode fluorescent lamps (EEFLs) parallel connected each other. The lamp driving device includes a power switch transistor, a diode, an inverter and a PWM controller. The transistor converts external DC power signal into pulse power signal based on switching signal, the diode prevents rush current from flowing into the transistor. The inverter converts the pulse power signal into AC power signal, raises voltage level of the AC power signal, and provides the lamps with the raised AC power signal. The PWM controller is activated by external on/off signal to provide the transistor with the switching signal so as to regulate voltage level of the AC power signal. The EEFLs can maintain a constant current level, and the backlight assembly can have characteristics of uniform luminance, high luminance and high heat efficiency.
Abstract:
Disclosed are a lamp, a method of fabricating the same and an LCD having the same. Electrode is disposed on an outer surface of a lamp tube, and an adhesive member is interposed between the electrode and the lamp tube. The adhesive member is hardened and expanded by means of heating, and adheres the electrode to the lamp tube. Thus, voids generated during forming the electrode on the outer surface is removed, and images having a high quality are obtained.
Abstract:
There is provided a lamp fixing holder. A lamp fixing holder for fixes a lamp to a receiving container. The lamp provides a liquid crystal display panel with light. The lamp includes a first portion of a face and a second portion of the face. The light emitted from the first portion of the face advances toward the liquid crystal display panel. The lamp fixing holder comprises a lamp fixing body and a fixing member. The lamp fixing body holds a third portion of the face of the lamp. The second portion includes the third portion. The fixing member fixes the lamp fixing body to the receiving container. The lamp fixing holder according to the present invention fixes the lamp so that the lamp does not sway, while minimizing an amount of light that is shielded by the lamp fixing holder.