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    Semiconductor memory device and method of manufacturing the same
    2.
    发明授权
    Semiconductor memory device and method of manufacturing the same 有权
    半导体存储器件及其制造方法

    公开(公告)号：US09530899B2

    公开(公告)日：2016-12-27

    申请号：US14474942

    申请日：2014-09-02

    Applicant: Bi O Kim ,  Jin-Tae Noh ,  Su-Jin Shin ,  Jae-Young Ahn ,  Ki-Hyun Hwang

    Inventor： Bi O Kim ,  Jin-Tae Noh ,  Su-Jin Shin ,  Jae-Young Ahn ,  Ki-Hyun Hwang

    IPC: H01L29/792 ,  H01L27/115 ,  G11C16/04 ,  H01L21/28 ,  H01L29/66

    CPC classification number: H01L29/7926 ,  H01L21/28282 ,  H01L27/11582 ,  H01L29/66833

    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes insulation layers and gate electrodes alternately stacked on a substrate, a vertical channel vertically passing through the insulation layers and the gate electrodes, and a threshold voltage controlling insulation layer, a tunnel insulation layer and a charge storage layer disposed between the vertical channel and the gate electrodes, wherein the threshold voltage controlling insulation layer is disposed between the charge storage layer and the vertical channel and including a material configured to suppress an inversion layer from being formed in the vertical channel.

    Abstract translation: 提供半导体器件及其制造方法。 半导体器件包括交替层叠在基板上的绝缘层和栅极电极，垂直通过绝缘层和栅电极的垂直沟道，以及设置在垂直线之间的阈值电压控制绝缘层，隧道绝缘层和电荷存储层 沟道和栅电极，其中所述阈值电压控制绝缘层设置在所述电荷存储层和所述垂直沟道之间，并且包括被配置为抑制在所述垂直沟道中形成反型层的材料。

    Atomic Layer Deposition (ALD) Apparatus
    3.
    发明申请
    Atomic Layer Deposition (ALD) Apparatus 审中-公开
    原子层沉积（ALD）装置

    公开(公告)号：US20160122871A1

    公开(公告)日：2016-05-05

    申请号：US14743101

    申请日：2015-06-18

    Applicant: Sang Hoon Lee ,  Jin Gyun Kim ,  Hyun Jin Shin ,  Han Vit Yang ,  Yong Seok Cho

    Inventor： Sang Hoon Lee ,  Jin Gyun Kim ,  Hyun Jin Shin ,  Han Vit Yang ,  Yong Seok Cho

    IPC: C23C16/455 ,  C23C16/50 ,  H01J37/32 ,  C23C16/52

    CPC classification number: H01J37/32449 ,  C23C16/045 ,  C23C16/452 ,  C23C16/45536 ,  H01J37/321 ,  H01L27/11582 ,  H01L29/40117

    Abstract: An atomic layer deposition (ALD) apparatus includes a first process chamber in which a substrate is accommodated, a plasma generating unit provided on the outside of the first process chamber, a source gas supply unit provided on an upper portion of the plasma generating unit, and configured to supply a plurality of source gases, a purge gas supply unit configured to supply a purge gas to the first process chamber, and a gas control unit configured to control the supply of the source gases and the purge gas, wherein the plasma generating unit includes a second process chamber providing a space in which plasma is generated and a plasma antenna inducing a magnetic field in the second process chamber, and the source gases are supplied to the first process chamber through the plasma generating unit.

    Abstract translation: 原子层沉积（ALD）装置包括容纳基板的第一处理室，设置在第一处理室外侧的等离子体产生单元，设置在等离子体产生单元的上部的源气体供应单元， 并且被配置为提供多个源气体;净化气体供应单元，被配置为向第一处理室供应净化气体;气体控制单元，被配置为控制源气体和净化气体的供应，其中等离子体产生 单元包括提供产生等离子体的空间的第二处理室和在第二处理室中产生磁场的等离子体天线，并且源气体通过等离子体产生单元供应到第一处理室。

    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    4.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体存储器件及其制造方法

    公开(公告)号：US20150129954A1

    公开(公告)日：2015-05-14

    申请号：US14474942

    申请日：2014-09-02

    Applicant: Bi O. Kim ,  Jin-Tae Noh ,  Su-Jin Shin ,  Jae-Young Ahn ,  Ki-Hyun Hwang

    Inventor： Bi O. Kim ,  Jin-Tae Noh ,  Su-Jin Shin ,  Jae-Young Ahn ,  Ki-Hyun Hwang

    IPC: H01L29/792

    CPC classification number: H01L29/7926 ,  H01L21/28282 ,  H01L27/11582 ,  H01L29/66833

    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes insulation layers and gate electrodes alternately stacked on a substrate, a vertical channel vertically passing through the insulation layers and the gate electrodes, and a threshold voltage controlling insulation layer, a tunnel insulation layer and a charge storage layer disposed between the vertical channel and the gate electrodes, wherein the threshold voltage controlling insulation layer is disposed between the charge storage layer and the vertical channel and including a material configured to suppress an inversion layer from being formed in the vertical channel.

    Abstract translation: 提供半导体器件及其制造方法。 半导体器件包括交替层叠在基板上的绝缘层和栅极电极，垂直通过绝缘层和栅电极的垂直沟道，以及设置在垂直线之间的阈值电压控制绝缘层，隧道绝缘层和电荷存储层 沟道和栅电极，其中所述阈值电压控制绝缘层设置在所述电荷存储层和所述垂直沟道之间，并且包括被配置为抑制在所述垂直沟道中形成反型层的材料。

    Three dimensional semiconductor memory device and method of fabricating the same
    7.
    发明授权
    Three dimensional semiconductor memory device and method of fabricating the same 有权
    三维半导体存储器件及其制造方法

    公开(公告)号：US08815676B2

    公开(公告)日：2014-08-26

    申请号：US13671948

    申请日：2012-11-08

    Applicant: Sang-Ryol Yang ,  Yoo-Chul Kong ,  Jung-Ho Kim ,  Jin-Gyun Kim ,  Jae-Jin Shin ,  Ji-Hoon Choi

    Inventor： Sang-Ryol Yang ,  Yoo-Chul Kong ,  Jung-Ho Kim ,  Jin-Gyun Kim ,  Jae-Jin Shin ,  Ji-Hoon Choi

    IPC: H01L21/00

    CPC classification number: H01L27/11582 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157

    Abstract: Methods of forming vertical nonvolatile memory devices may include forming an electrically insulating layer, which includes a composite of a sacrificial layer sandwiched between first and second mold layers. An opening extends through the electrically insulating layer and exposes inner sidewalls of the first and second mold layers and the sacrificial layer. A sidewall of the opening may be lined with an electrically insulating protective layer and a first semiconductor layer may be formed on an inner sidewall of the electrically insulating protective layer within the opening. At least a portion of the sacrificial layer may then be selectively etched from between the first and second mold layers to thereby define a lateral recess therein, which exposes an outer sidewall of the electrically insulating protective layer.

    Abstract translation: 形成垂直非易失性存储器件的方法可以包括形成电绝缘层，其包括夹在第一和第二模具层之间的牺牲层的复合材料。 开口延伸穿过电绝缘层并暴露第一和第二模具层和牺牲层的内侧壁。 开口的侧壁可以衬有电绝缘保护层，并且可以在开口内的电绝缘保护层的内侧壁上形成第一半导体层。 然后可以从第一和第二模具层之间选择性地蚀刻牺牲层的至少一部分，从而在其中限定其中暴露电绝缘保护层的外侧壁的横向凹部。

    Display device having decreased bezel width
    8.
    发明授权
    Display device having decreased bezel width 有权
    显示设备具有减少的边框宽度

    公开(公告)号：US08670085B2

    公开(公告)日：2014-03-11

    申请号：US12981732

    申请日：2010-12-30

    Applicant: Ki Nam Jean ,  Nam Do Son ,  Song Ryol You ,  Sung Jin Shin ,  Kyeong Tak Baek ,  Seong Rok Kim ,  Dong Yong Kim ,  Min Jae Kim

    Inventor： Ki Nam Jean ,  Nam Do Son ,  Song Ryol You ,  Sung Jin Shin ,  Kyeong Tak Baek ,  Seong Rok Kim ,  Dong Yong Kim ,  Min Jae Kim

    IPC: G02F1/1333

    CPC classification number: G02F1/133308 ,  G02F2001/133317 ,  G02F2001/13332 ,  G02F2201/465

    Abstract: Disclosed is a display device with small thickness and good aesthetic exterior appearance, which comprises a liquid crystal display panel for displaying images; a backlight unit for supplying light to the liquid crystal display panel; and a support member for supporting the liquid crystal display panel and the backlight unit, wherein the support member comprises a set cover for receiving the liquid crystal display panel and the backlight unit, the set cover functioning as an external cover; and a guide frame for guiding the position of the liquid crystal display panel and backlight unit, wherein the guide frame and liquid crystal display panel are connected with each other by a connection member provided therebetween. At this time, the lower and lateral sides of the display device are covered without using upper and external cases to cover the upper edge of display device. Thus, the entire thickness of the display device is decreased; the bezel width of the display device is also decreased; and the entire step coverage of the display device is removed, whereby the front of the display device is recognized as one structure, to thereby allow the good aesthetic exterior appearance of the display device.

    Abstract translation: 公开了一种厚度小，美观外观的显示装置，其包括用于显示图像的液晶显示面板; 用于向液晶显示面板供给光的背光单元; 以及用于支撑液晶显示面板和背光单元的支撑构件，其中所述支撑构件包括用于接收液晶显示面板和背光单元的组盖，所述组盖用作外盖; 以及用于引导液晶显示面板和背光单元的位置的引导框架，其中引导框架和液晶显示面板通过设置在其间的连接构件彼此连接。 此时，显示装置的下侧和外侧被覆盖而不使用上部和外部壳体来覆盖显示装置的上边缘。 因此，显示装置的整体厚度减小; 显示装置的边框宽度也减小; 并且去除了显示装置的整个步骤覆盖，由此将显示装置的前部识别为一个结构，从而允许显示装置的良好的美观外观。

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