公开(公告)号：US20120112350A1

公开(公告)日：2012-05-10

申请号：US13300692

申请日：2011-11-21

Applicant: Jakob Kriz ,  Norbert Urbansky

Inventor： Jakob Kriz ,  Norbert Urbansky

IPC: H01L23/48 ,  H01L21/768 ,  H01L21/28

CPC classification number: H01L23/53223 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76864 ,  H01L21/76873 ,  H01L21/76885 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53295 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/03462 ,  H01L2224/03848 ,  H01L2224/0391 ,  H01L2224/05557 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2224/05552

Abstract: Embodiments relate to a method for making a semiconductor structure, the method comprising: forming a seed layer in direct contact with a dielectric material; forming a masking layer over the seed layer; patterning the masking layer to expose the seed layer; forming a fill layer over the exposed seed layer; and causing the seed layer to react with the dielectric layer to form a barrier layer between the fill layer and the dielectric layer

Abstract translation: 实施例涉及制造半导体结构的方法，所述方法包括：形成与电介质材料直接接触的晶种层; 在种子层上形成掩模层; 图案化掩模层以暴露种子层; 在所述暴露的种子层上形成填充层; 并使种子层与介电层反应，以在填充层和介电层之间形成阻挡层

公开(公告)号：US07326985B2

公开(公告)日：2008-02-05

申请号：US10692024

申请日：2003-10-23

Applicant: Ralf Staub ,  Jürgen Amon ,  Norbert Urbansky

Inventor： Ralf Staub ,  Jürgen Amon ,  Norbert Urbansky

IPC: H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC classification number: H01L21/76808 ,  H01L21/28512 ,  H01L21/76807 ,  H01L21/76877 ,  H01L21/76895 ,  H01L21/76897 ,  H01L27/10829 ,  H01L27/10885 ,  H01L27/10888 ,  H01L27/10894 ,  Y10S257/905

Abstract: A memory cell and method of forming the same is provided. To make contact between a bit line and a select transistor of a dynamic memory unit on a semiconductor wafer, a contact hole is filled with a metal or a metal alloy. A liner layer may be introduced between the semiconductor substrate and the metal filling. The semiconductor substrate has a doped region in the contact hole.

Abstract translation: 提供了一种存储单元及其形成方法。 为了在半导体晶片上的动态存储单元的位线和选择晶体管之间进行接触，接触孔填充有金属或金属合金。 可以在半导体衬底和金属填充物之间引入衬里层。 半导体衬底在接触孔中具有掺杂区域。

公开(公告)号：US06855630B1

公开(公告)日：2005-02-15

申请号：US10614430

申请日：2003-07-07

Applicant: Alexander Ruf ,  Norbert Urbansky ,  Wilhelm Claussen ,  Thomas Gärtner ,  Sven Schmidbauer

Inventor： Alexander Ruf ,  Norbert Urbansky ,  Wilhelm Claussen ,  Thomas Gärtner ,  Sven Schmidbauer

IPC: H01L21/285 ,  H01L21/768 ,  H01L21/44 ,  H01L21/336

CPC classification number: H01L21/76843 ,  H01L21/28518 ,  H01L21/76856

Abstract: A method makes contact with a doping region formed at a substrate surface of a substrate. An insulating layer is applied on the substrate surface and a contact hole is formed in the insulating layer. A metal-containing layer is subsequently deposited on the insulating layer and the surface region of the doping region that is uncovered by the contact hole. In a subsequent thermal process having two steps, first the metal-containing layer is reacted with the silicon of the doping region to form a metal silicide layer and then the rest of the metal-containing layer is converted into a metal-nitride-containing layer in a second thermal step.

Abstract translation: 一种方法与形成在衬底的衬底表面上的掺杂区域接触。 绝缘层被施加在基板表面上，并且在绝缘层中形成接触孔。 随后，在绝缘层和未被接触孔覆盖的掺杂区域的表面区域上沉积含金属层。 在具有两个步骤的随后的热处理中，首先使含金属层与掺杂区的硅反应形成金属硅化物层，然后将其余的含金属层转化为含金属氮化物的层 在第二热步骤中。