公开(公告)号：US5351014A

公开(公告)日：1994-09-27

申请号：US101386

申请日：1993-08-02

Applicant: Osamu Ichiyoshi

Inventor： Osamu Ichiyoshi

IPC: H03L7/197 ,  H03L7/085 ,  H03L7/18 ,  H03L7/16

CPC classification number: H03L7/1806 ,  H03L7/085

Abstract: A frequency synthesizer is composed of a reference oscillator, the first and the second integrators, a binary adder, a low pass filter and VCO forming a Phase Locked Loop (PLL). The first integrator, driven by the timing of a reference oscillator, integrates an externally supplied value K and generates the input signal. The second integrator, driven by the output signal of the VCO of the PLL, integrates an externally supplied value L. The binary adder detects the difference between the outputs of the first and the second integrators functioning as a phase comparator. The output of the phase comparator is converted into an analog voltage which is filtered to control the VCO to achieve frequency synthesis by the phase lock function of the loop.

Abstract translation: 频率合成器由参考振荡器，第一和第二积分器，二进制加法器，低通滤波器和形成锁相环（PLL）的VCO组成。 由参考振荡器的定时驱动的第一个积分器集成了外部提供的值K并产生输入信号。 由PLL的VCO的输出信号驱动的第二积分器对外部提供的值L进行积分。二进制加法器检测用作相位比较器的第一和第二积分器的输出之间的差异。 相位比较器的输出被转换为模拟电压，该模拟电压被滤波以控制VCO，以通过回路的锁相功能实现频率合成。

公开(公告)号：US5268647A

公开(公告)日：1993-12-07

申请号：US947700

申请日：1992-09-21

Applicant: Osamu Ichiyoshi

Inventor： Osamu Ichiyoshi

IPC: H04L27/227 ,  H04L27/00 ,  H04L27/22 ,  H04L27/233 ,  H03D3/00

CPC classification number: H04L27/2332 ,  H04L2027/003 ,  H04L2027/0057 ,  H04L2027/0081

Abstract: In order to coherently demodulate an incoming multi-phase PSK analog signal irrespective of large frequency deviation, an automatic frequency feedback loop is provided. An analog baseband signal is generated by multiplying the IF analog signal by a local signal and then is converted into the corresponding digital baseband signal. A multiplier multiplies the digital baseband signal by another local signal. The output of the multiplier is further multiplied and then applied to a plurality of single-tuned filters which are arranged in parallel and have tuning frequencies each different from an adjacent frequency by a predetermined frequency interval. Each of the plurality of single-tuned filters generates a signal for use in carrier recovery, a frequency error signal and a correlation coefficient. Subsequently, one of the plurality of single-tuned filters is selected in a manner wherein the maximum value is detected among the correlation coefficients. The another local signal is generated using the frequency error signal of the single-tuned filter which has been selected. A modulating signal is reproduced using the recovered carrier in a conventional manner.

公开(公告)号：US4785447A

公开(公告)日：1988-11-15

申请号：US155301

申请日：1988-02-12

Applicant: Osamu Ichiyoshi

Inventor： Osamu Ichiyoshi

IPC: H03H17/02 ,  H04J1/05 ,  H04J4/00

CPC classification number: H04J1/05 ,  H03H17/0213

Abstract: An N-channel FDM signal is converted into complex signals of baseband frequencies spaced at intervals equal to frequency .DELTA.f. The complex baseband signals are converted first into digital samples having a frequency N.DELTA.f and then into N parallel digital signals. A plurality of first FIR subfilters respectively perform filtering on each of the parallel digital signals at frequency .DELTA.f to produce a first series of filtered digital signals from each of the first FIR subfilters, and (m-1) groups of second FIR subfilters respectively perform filtering on each of the parallel digital signals at frequency .DELTA.f to produce a second series of filtered digital samples from each of the second FIR subfilters at timing displaced with respect to the first series by a/m.DELTA.f, where is an integer ranging from unity to (m-1) and m is an integer equal to or greater than 2. Outputs of the first FIR subfilters are combined with outputs of the second FIR subfilters to produce N summation outputs at frequency m.DELTA.f. An N-point Fast Fourier Transform processor performs fast Fourier transform on the N summation outputs at frequency m.DELTA.f to derive digital channels. Because of the oversampling at frequency m.DELTA.f, each of the digital channels has a frequency response which can be made flat over the bandwidth .DELTA.f.

公开(公告)号：US07002945B2

公开(公告)日：2006-02-21

申请号：US09851975

申请日：2001-05-10

Applicant: Osamu Ichiyoshi

Inventor： Osamu Ichiyoshi

IPC: H04B7/216 ,  H04B1/69 ,  H04B1/707 ,  H04J3/06

CPC classification number: H04L5/026

Abstract: A spreading code setting circuit generates N vectors, as spreading codes, which are +1 or −1 polarity and are unique to users. A multiplier multiplies the nth data and the nth spreading code corresponding thereto for the spread modulation. An FDM combining circuit modulates N pieces of data according to the FDM method. A FDM separating circuit demodulates received signals according to the FDM method. An inverse spreading code setting circuit generates N vectors, as inverse spreading codes, which are +1 or −1 polarity and are unique to users at the transmission side. A multiplier multiplies the nth data and the nth inverse spreading code corresponding thereto for inverse spread modulation.

Abstract translation: 扩展码设置电路产生N个向量，作为扩展码，其为+1或-1极性，并且是用户唯一的。 乘法器将对应于其的第n个数据和第n个扩展码乘以扩展调制。 FDM组合电路根据FDM方法对N个数据进行调制。 FDM分离电路根据FDM方法解调接收信号。 反向扩展码设置电路产生作为反向扩展码的N个向量，它们是+1或-1极性，并且对于发送侧的用户是唯一的。 乘法器将与其对应的第n个数据和第n个反向扩展码乘以进行反向扩展调制。

公开(公告)号：US5867792A

公开(公告)日：1999-02-02

申请号：US971506

申请日：1997-11-17

Applicant: Osamu Ichiyoshi

Inventor： Osamu Ichiyoshi

IPC: H04B7/26 ,  H04B1/00 ,  H04B7/00 ,  H04B7/15

CPC classification number: H04B7/155

Abstract: A radio communication system comprises a plurality of personal terminals and a base station, the personal terminal being equipped with a non-directional antenna or a directional antenna directed to the base station, which transmits and receives a signal at an identical frequency, the base station, which establishes a communication path between the personal terminals by relaying of the signals, comprising a non-directional transmitting antenna and a receiving antenna located in such a positional relationship as to minimize the amounts of the signals coupled at the respective antennas, and feeds the received signal received by the receiving antenna to the transmitting antenna while cancelling a leakage signal from the transmitting antenna which is contained in the received signal, by using a reference signal set on a given frequency channel which may be modulated with a broadcast signal.

Abstract translation: 无线电通信系统包括多个个人终端和基站，该个人终端装备有定向天线或指向基站的定向天线，其以相同的频率发送和接收信号，该基站 ，其通过中继信号来建立个人终端之间的通信路径，包括非定向发射天线和位置关系中的接收天线，以使耦合在各个天线的信号的量最小化，并馈送 通过使用在可以利用广播信号进行调制的给定频率信道上设置的参考信号，从接收天线接收到的接收信号发送到发射天线，同时从接收信号中包含的发射天线中消除泄漏信号。

公开(公告)号：US5281974A

公开(公告)日：1994-01-25

申请号：US915764

申请日：1992-07-21

Applicant: Akio Kuramoto ,  Toshinobu Yamane ,  Osamu Ichiyoshi ,  Kazuo Kosukegawa

Inventor： Akio Kuramoto ,  Toshinobu Yamane ,  Osamu Ichiyoshi ,  Kazuo Kosukegawa

IPC: H01Q3/30 ,  H01Q21/22

CPC classification number: H01Q21/22 ,  H01Q3/30

Abstract: In an antenna device comprising an antenna block which can electrically control a direction of a radio wave transmitted or received by the antenna device, a phase shift unit is connected to the antenna block to phase shift an external electric signal or an internal electric signal given to or from the antenna device. The phase shift unit has variable and discrete phase shifts switched from one to another in response to a control signal supplied from a controller and supplies a phase shifted external signal to the antenna block or a phase shifted internal signal to an external device. The antenna block comprises a plurality of antenna elements and a plurality of phase shifters which are connected to the antenna elements to send the phase shifted external signal to the respective antenna elements or to send the internal electric signal to the phase shift unit.

Abstract translation: 在包括天线块的天线装置中，天线块可以电气地控制由天线装置发送或接收的无线电波的方向，相位单元连接到天线块，以将外部电信号或给定的内部电信号 或从天线装置。 相移单元响应于从控制器提供的控制信号而将可变和离散相移从一个切换到另一个，并将相移的外部信号提供给天线块或将相移的内部信号提供给外部设备。 天线块包括多个天线元件和多个移相器，其连接到天线元件以将相移的外部信号发送到相应的天线元件或将内部电信号发送到相移单元。

公开(公告)号：US4879713A

公开(公告)日：1989-11-07

申请号：US249943

申请日：1988-09-27

Applicant: Osamu Ichiyoshi

Inventor： Osamu Ichiyoshi

IPC: G01S5/06 ,  G01S19/46 ,  H04B7/216

CPC classification number: G01S19/00 ,  G01S5/06 ,  H04B7/216

Abstract: A satellite-based vehicle communication/position determination system constituted by N (N.gtoreq.3) geostationary satellites, a plurality of vehicle stations for performing radio-wave exchange with the satellites using a low-directivity antenna, and a base station having high-directivity antennas for independently performing radio-wave exchange with the N geostationary satellites is disclosed. The base station has a communication FDM receiver, N chirp signal receivers for receiving and pulse compressing chirp signals from a vehicle station, which are obtained via the N geostationary satellites, and a circuit for determining the position of the vehicle station based on time differences of compressed pulses from the chirp signal receivers. Each vehicle station has a communication FDM receiver, a transmitter, a chirp signal generator, and a switching control circuit for controlling to selectively output a transmitting signal or the chirp signal.

公开(公告)号：US4759013A

公开(公告)日：1988-07-19

申请号：US905427

申请日：1986-09-10

Applicant: Osamu Ichiyoshi

Inventor： Osamu Ichiyoshi

IPC: H04J1/05 ,  H04J4/00

CPC classification number: H04J4/005

Abstract: An FDM-TDM transmultiplexing system for a modulation/demodulation device which is applicable to a regenerative repeating system of a satellite or a ground radio communication system is disclosed which uses chirp-z-transform. A chirp filter is implemented with a digital circuit. The circuit scale of the digital chirp filter increases in proportion to a square root of the total number of channels N, enhancing miniaturization of an FDM-TDM transmultiplexer.

Abstract translation: 公开了一种适用于卫星或地面无线电通信系统的再生重复系统的用于调制/解调装置的FDM-TDM多路复用系统，其使用啁啾变换。 啁啾滤波器用数字电路实现。 数字线性调频滤波器的电路规模与总信道数N的平方根成比例地增加，从而增强了FDM-TDM多路复用器的小型化。

公开(公告)号：US4339725A

公开(公告)日：1982-07-13

申请号：US133744

申请日：1980-03-25

Applicant: Osamu Ichiyoshi

Inventor： Osamu Ichiyoshi

IPC: H04L27/227 ,  H03D3/18 ,  H04L27/22

CPC classification number: H04L27/2272

Abstract: An N-phase PSK demodulator is disclosed wherein all circuits therein operate in a frequency band equal to or below the carrier band. The locally reproduced carrier is generated by a phase locked loop in combination with a frequency converter means and a divide-by-two frequency divider. The frequency converter means consists of n identical frequency converter circuits connected in series, where 2.sup.n =N. For a 2-phase PSK demodulator where n=1, the 2-phase PSK modulated wave is applied as a first input and the reproduced carrier divided by two is applied as a second input to the frequency converter circuit. A mixer and filter provide as an output the difference frequency between the first and second inputs. The latter output is multiplied by two and applied as the input to the phase locked loop. Where n>1, the first input of each frequency converter circuit except the first is the output from the preceeding circuit, and the output from the last frequency converter circuit is the input to the phase locked loop.

Abstract translation: 公开了一种N相PSK解调器，其中其中所有电路在等于或低于载波频带的频带内工作。 本地再现的载波由与频率转换器装置和分频二分频器组合的锁相环产生。 变频器装置由串联连接的n个相同的变频器电路组成，其中2n = N。 对于n = 1的2相PSK解调器，将2相PSK调制波作为第一输入，并将再生载波除以2作为第二输入施加到变频器电路。 混频器和滤波器作为输出提供第一和第二输入之间的差频。 后一个输出乘以2并作为输入施加到锁相环。 其中n> 1，除了第一个之外的每个变频器电路的第一个输入是前一个电路的输出，最后一个变频器电路的输出是锁相环的输入。

公开(公告)号：US5699383A

公开(公告)日：1997-12-16

申请号：US611557

申请日：1996-03-06

Applicant: Osamu Ichiyoshi

Inventor： Osamu Ichiyoshi

IPC: H03F1/30 ,  H03C3/08 ,  H03F1/32 ,  H04B1/04 ,  H04L27/36 ,  H04B3/08

CPC classification number: H03C3/08 ,  H03F1/3247 ,  H03F1/3294 ,  H04L27/368 ,  H03F2200/102 ,  H03F2201/3233

Abstract: In a high-power transmitter, an input complex signal is multiplied in a complex multiplier by control signals. The output complex signal from the multiplier is converted to a high frequency signal and amplified by a power amplifier for transmission. The amplitude of the input complex signal is detected to access a memory where amplitude and phase correction values are stored. During a read mode of the memory, a set of amplitude and phase correction values is specified by the detected amplitude and supplied to the complex amplifier as the control signals. During a write mode of the memory, a set of amplitude and phase correction values is specified by a delayed version of the detected amplitude and rewritten with a set of new amplitude and phase correction values. The amplified high frequency signal is down-converted to a low frequency complex signal. The nonlinearity of the power amplifier is determined from a delayed version of the input complex signal and the down-converted complex signal and the new amplitude and phase correction values are produced from the detected nonlinearity and delayed versions of the amplitude and phase correction values which were supplied to the complex multiplier. At intervals, the memory is switched from the read mode to the write mode for updating its contents.

Abstract translation: 在大功率发射机中，输入复信号通过控制信号在复数乘法器中相乘。 来自乘法器的输出复信号被转换为高频信号并由功率放大器放大以用于传输。 检测输入复信号的幅度以访问存储振幅和相位校正值的存储器。 在存储器的读取模式期间，通过检测到的幅度指定一组幅度和相位校正值，并将其提供给复数放大器作为控制信号。 在存储器的写入模式期间，一组幅度和相位校正值由检测到的幅度的延迟版本指定并用一组新的幅度和相位校正值重写。 放大的高频信号被下变频成低频复信号。 功率放大器的非线性由输入复合信号和下变频复信号的延迟版本确定，新的幅度和相位校正值由检测到的非线性和幅度和相位校正值的延迟版本产生，幅度和相位校正值是 提供给复数乘法器。 间隔地，存储器从读取模式切换到用于更新其内容的写入模式。