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15 条记录 (耗时 0.016 秒)

    Automated calibration of I/O over a multi-variable eye window
    11.
    发明授权
    Automated calibration of I/O over a multi-variable eye window 有权
    通过多变量眼睛窗口自动校准I / O

    公开(公告)号：US07296104B2

    公开(公告)日：2007-11-13

    申请号：US11224277

    申请日：2005-09-12

    申请人： Brian L. Smith ,  Jue Wu ,  Jyh-Ming Jong ,  Wai Fong ,  Leo Yuan ,  Prabhansu Chakrabarti

    发明人： Brian L. Smith ,  Jue Wu ,  Jyh-Ming Jong ,  Wai Fong ,  Leo Yuan ,  Prabhansu Chakrabarti

    IPC分类号： G06F13/42 ,  G06F11/04 ,  G06K5/04

    CPC分类号： G06F11/24 ,  H02H1/00 ,  H02H3/385 ,  H02H7/267

    摘要： A method and apparatus for automated calibration of I/O over a multi-variable eye window is provided. A transmitter may conduct data transmissions to a receiver of an integrated circuit (IC) over a plurality of signal lines. The data transmissions may be conducted according to a certain parameters or sets of parameters. Parameters may include voltage levels at which signals are transmitted or timing delays. The receiver may determine whether the correct data value was received over each signal line. The results may be recorded in a storage mechanism in the same IC as the receiver. The storage mechanism may, for each signal line, store a pass/fail result corresponding to the particular parameters for the data transmission. The system may select the parameters which subsequent transmissions are to be conducted over each of the plurality of signal lines from the storage mechanism.

    摘要翻译： 提供了一种用于通过多变量眼窗自动校准I / O的方法和装置。 发射机可以通过多条信号线对集成电路（IC）的接收机进行数据传输。 可以根据某些参数或参数集进行数据传输。 参数可以包括传输信号的电压电平或定时延迟。 接收机可以确定是否在每个信号线上接收到正确的数据值。 结果可以记录在与接收器相同的IC中的存储机构中。 对于每个信号线，存储机构可以存储对应于用于数据传输的特定参数的通过/失败结果。 系统可以从存储机构中选择要在多条信号线中的每条信号上进行后续传输的参数。

    Remote DC-DC converter for high current, low voltage applications
    12.
    发明授权
    Remote DC-DC converter for high current, low voltage applications 有权
    用于高电流，低电压应用的远程DC-DC转换器

    公开(公告)号：US07292020B1

    公开(公告)日：2007-11-06

    申请号：US11069433

    申请日：2005-03-01

    申请人： Lawrence D. Smith ,  Prabhansu Chakrabarti ,  William H. Schwartz

    发明人： Lawrence D. Smith ,  Prabhansu Chakrabarti ,  William H. Schwartz

    IPC分类号： H03H1/00 ,  G06F1/04

    CPC分类号： H03H7/0115

    摘要： A remote voltage regulator module (VRM) for high-current, low voltage applications. In one embodiment, an electronic system includes a VRM configured to provide a DC output voltage. The VRM is coupled to a load board via a first bus bar and a second bus bar. The VRM includes a first capacitance of a first amount, while the load board includes a second capacitance of a second amount. A loop between the VRM and the load board is formed by the first and second bus bars and first and second capacitances. The loop is characterized by a transfer function that is second order or less.

    摘要翻译： 用于高电流，低电压应用的远程稳压器模块（VRM）。 在一个实施例中，电子系统包括配置成提供DC输出电压的VRM。 VRM经由第一母线和第二母线耦合到负载板。 VRM包括第一量的第一电容，而负载板包括第二量的第二电容。 VRM和负载板之间的环路由第一和第二母线以及第一和第二电容形成。 该循环的特征在于二阶或更少的传递函数。

    Method and apparatus for detecting valid clock signals at a clock receiver circuit
    13.
    发明授权
    Method and apparatus for detecting valid clock signals at a clock receiver circuit 有权
    用于在时钟接收机电路检测有效时钟信号的方法和装置

    公开(公告)号：US06737892B2

    公开(公告)日：2004-05-18

    申请号：US09741485

    申请日：2000-12-18

    申请人： Jyh-Ming Jong ,  Chung-Hsiao Wu ,  Prabhansu Chakrabarti ,  Leo Yuan

    发明人： Jyh-Ming Jong ,  Chung-Hsiao Wu ,  Prabhansu Chakrabarti ,  Leo Yuan

    IPC分类号： H03K519

    CPC分类号： G06F1/04

    摘要： One embodiment of the present invention provides a system for detecting a valid clock signal at a clock receiver. The system operates by receiving a clock signal at the clock receiver, and directing the clock signal into a control input of a voltage-controlled variable resistor. Next, the system uses the voltage-controlled variable resistor to control a first current. A current mirror is then employed to create a second current from the first current. This second current passes through a resistor to produce a control voltage, which is amplified to produce a validity signal indicating whether or not the clock signal is valid. In one embodiment of the present invention, the system additionally uses at least one capacitor to filter out periodic fluctuations in the validity signal.

    摘要翻译： 本发明的一个实施例提供一种用于在时钟接收器处检测有效时钟信号的系统。 该系统通过在时钟接收器处接收时钟信号并将时钟信号引导到压控可变电阻器的控制输入中来操作。 接下来，系统使用压控可变电阻来控制第一电流。 然后使用电流镜来从第一电流产生第二电流。 该第二电流通过电阻器以产生控制电压，其被放大以产生指示时钟信号是否有效的有效信号。 在本发明的一个实施例中，该系统另外使用至少一个电容器来滤除有效信号中的周期性波动。