Methods for manufacturing a radio frequency identification tag without aligning the chip and antenna
    2.
    发明授权
    Methods for manufacturing a radio frequency identification tag without aligning the chip and antenna 有权
    制造射频识别标签而不对准芯片和天线的方法

    公开(公告)号:US08635762B1

    公开(公告)日:2014-01-28

    申请号:US11533741

    申请日:2006-09-20

    IPC分类号: H01Q17/00

    摘要: A method for attaching antennae to RFID tags is disclosed. Included is the use of RFID tags having asymmetrical interconnect system for one or more antennae, such that virtually any rotational orientation of the RFID tag will result in a successful antennae attachment. Two oversized and “L” shaped gold-bumped holes can be arranged on the same side of the ship in an opposing action, such that at least one axis of symmetry is formed. Accordingly, virtually all rotational orientations of the chip are then acceptable when attaching a pair of opposing pole antenna leads. Alternatively, a pair of poles can be located on opposing chips surfaces, such that antenna substrates can be attached to both the top and bottom of the chip to form a product “sandwich”, whereby the rotational orientation of the chip is irrelevant at an antenna attachment step.

    摘要翻译: 公开了一种将天线连接到RFID标签的方法。 包括使用具有用于一个或多个天线的不对称互连系统的RFID标签,使得RFID标签的实际上任何旋转取向将导致成功的天线附接。 两个大尺寸和“L”形的金凸起的孔可以以相对的作用布置在船的同一侧上,使得形成至少一个对称轴。 因此,当连接一对相对的极天线引线时,芯片的几乎所有的旋转取向都是可接受的。 或者,一对极可以位于相对的芯片表面上,使得天线基板可以附接到芯片的顶部和底部,以形成产品“夹心”,由此芯片的旋转取向在天线处是不相关的 附件步骤。

    Electrical die contact structure and fabrication method
    3.
    发明授权
    Electrical die contact structure and fabrication method 有权
    电模接触结构及制造方法

    公开(公告)号:US07795126B2

    公开(公告)日:2010-09-14

    申请号:US11969756

    申请日:2008-01-04

    IPC分类号: H01L21/00 H01L21/44

    摘要: A semiconductor device of the invention includes an integrated circuit formed on a semiconductor substrate having first and second surfaces and a notch region along the edges. The first surface includes electrical contact pads electrically connected with the integrated circuit. The first surface of the semiconductor substrate includes a top protective layer that has a surface portion extending beyond the edges of the semiconductor substrate. The second surface of the semiconductor substrate includes a bottom protective layer with electrical connectors. The surface portion of the top protective layer includes electrical contact pads that are electrically interconnected with electrical contact pad extensions. The electrical contact pad extensions are interconnected with electrical connectors via a backside electrical connector that overlaps the electrical contact pad extensions forming a lap connection. Methods for constructing such devices and connections are also disclosed.

    摘要翻译: 本发明的半导体器件包括形成在具有第一和第二表面的半导体衬底上的集成电路和沿着边缘的切口区域。 第一表面包括与集成电路电连接的电接触垫。 半导体衬底的第一表面包括具有延伸超过半导体衬底的边缘的表面部分的顶部保护层。 半导体衬底的第二表面包括具有电连接器的底部保护层。 顶部保护层的表面部分包括与电接触焊盘延伸部电互连的电接触焊盘。 电接触焊盘延伸部经由背面电连接器与电连接器互连,后侧电连接器与形成搭接连接的电接触垫延伸部重叠。 还公开了用于构造这种装置和连接的方法。

    Leadless package
    4.
    发明授权
    Leadless package 有权
    无铅封装

    公开(公告)号:US06723585B1

    公开(公告)日:2004-04-20

    申请号:US10286320

    申请日:2002-10-31

    IPC分类号: H01L2144

    摘要: A variety of leadless packaging arrangements and methods of packaging integrated circuits in leadless packages are disclosed. The described lead frames are generally arranged such that each device area has a plurality of contacts but no die attach pad. With this arrangement, the back surface of the die is exposed and coplanar with the exposed bottom surface of the contacts. A casing material (typically plastic) holds the contacts and die in place. In one aspect of the invention, the back surface of the die is metallized. The metallization forms a good attachment surface for the package and serves as a good thermal path to transfer heat away from the die. In another aspect, at least some of the contacts have a top surface, a shelf, and a bottom surface. The die is wire bonded (or otherwise electrically connected) to the shelf portions of the contacts. The described package is quite versatile. In some embodiments, the top surfaces of the contacts are also left exposed which provides a very low profile device that is particularly well suited for stacking. A stack of LLP devices can thus readily be provided or other devices can be stacked on top of the described devices. In some embodiments, a heat sink may be attached directly to the metallized bottom surface of the die or package. This tends to provide a good thermal path from the die. In another aspect of the invention, a lead frame panel suitable for use in packaging these semiconductor devices is described.

    摘要翻译: 公开了在无引线封装中封装集成电路的各种无引线封装结构和方法。 所描述的引线框架通常布置成使得每个器件区域具有多个触点,但是没有管芯附接垫。 利用这种布置,裸片的背面被暴露并与触头的暴露的底表面共面。 套管材料(通常是塑料)将接触件和模具保持在适当的位置。 在本发明的一个方面,模具的背面被金属化。 金属化形成了用于封装的良好的附接表面,并且用作将热量从模具传送出去的良好的热路径。 在另一方面,至少一些触点具有顶表面,搁板和底表面。 模具与触点的搁板部分线接合(或以其他方式电连接)。 描述的包是非常通用的。 在一些实施例中,触点的顶表面也被暴露,这提供了非常适合于堆叠的非常薄型的装置。 因此,可以容易地提供一堆LLP装置,或者可以在所述装置的顶部上堆叠其他装置。 在一些实施例中,散热器可以直接附接到模具或包装的金属化底表面。 这倾向于提供来自模头的良好的热路径。 在本发明的另一方面,描述了适用于封装这些半导体器件的引线框架面板。

    Electrical die contact structure and fabrication method
    6.
    发明授权
    Electrical die contact structure and fabrication method 有权
    电模接触结构及制造方法

    公开(公告)号:US07340181B1

    公开(公告)日:2008-03-04

    申请号:US10145295

    申请日:2002-05-13

    IPC分类号: H04B10/00

    摘要: A semiconductor device of the invention includes an integrated circuit formed on a semiconductor substrate having first and second surfaces and a notch region along the edges. The first surface includes electrical contact pads electrically connected with the integrated circuit. The first surface of the semiconductor substrate includes a top protective layer that has a surface portion extending beyond the edges of the semiconductor substrate. The second surface of the semiconductor substrate includes a bottom protective layer with electrical connectors. The surface portion of the top protective layer includes electrical contact pads that are electrically interconnected with electrical contact pad extensions. The electrical contact pad extensions are interconnected with electrical connectors via a backside electrical connector that overlaps the electrical contact pad extensions forming a lap connection. Methods for constructing such devices and connections are also disclosed.

    摘要翻译: 本发明的半导体器件包括形成在具有第一和第二表面的半导体衬底上的集成电路和沿着边缘的切口区域。 第一表面包括与集成电路电连接的电接触垫。 半导体衬底的第一表面包括具有延伸超过半导体衬底的边缘的表面部分的顶部保护层。 半导体衬底的第二表面包括具有电连接器的底部保护层。 顶部保护层的表面部分包括与电接触焊盘延伸部电互连的电接触焊盘。 电接触焊盘延伸部经由背面电连接器与电连接器互连,后侧电连接器与形成搭接连接的电接触垫延伸部重叠。 还公开了用于构造这种装置和连接的方法。

    Design of a two interconnect IC chip for a radio frequency identification tag and method for manufacturing same
    7.
    发明授权
    Design of a two interconnect IC chip for a radio frequency identification tag and method for manufacturing same 有权
    用于射频识别标签的两个互连IC芯片的设计及其制造方法

    公开(公告)号:US07230580B1

    公开(公告)日:2007-06-12

    申请号:US10651683

    申请日:2003-08-29

    IPC分类号: H01Q7/00

    摘要: An apparatus and method for attaching antennae to RFID tags is disclosed. Included is the use of RFID tags having a symmetrical interconnect system for attaching one or more antennae, such that virtually any rotational orientation of the RFID tag will result in a successful antennae attachment. Two oversized and “L” shaped gold-bumped poles can be arranged on the same side of a chip in an opposing fashion, such that at least one axis of symmetry is formed. Accordingly, virtually all rotational orientations of the chip are then acceptable when attaching a pair of opposing pole antenna leads. Alternatively, a pair of poles can be located on opposing chip surfaces, such that antenna substrates can attach to both the top and bottom of the chip to form a product “sandwich,” whereby the rotational orientation of the chip is irrelevant at an antenna attachment step.

    摘要翻译: 公开了一种用于将天线附接到RFID标签的装置和方法。 包括使用具有用于附接一个或多个天线的对称互连系统的RFID标签,使得RFID标签的实际上任何旋转取向将导致成功的天线附接。 两个大尺寸和“L”形的金凸极可以以相对的方式布置在芯片的同一侧上,使得形成至少一个对称轴。 因此,当连接一对相对的极天线引线时,芯片的几乎所有的旋转取向都是可接受的。 或者,一对极可以位于相对的芯片表面上,使得天线基板可以附接到芯片的顶部和底部两者以形成产品“夹心”,由此芯片的旋转取向在天线附件上是不相关的 步。