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    Calibrating return time
    11.
    发明申请
    Calibrating return time 失效
    校准返回时间

    公开(公告)号：US20050039066A1

    公开(公告)日：2005-02-17

    申请号：US10918209

    申请日：2004-08-13

    Applicant: Thomas Simon ,  Rajeevan Amirtharajah

    Inventor： Thomas Simon ,  Rajeevan Amirtharajah

    IPC: H04J3/06 ,  H04L7/00 ,  G06F1/12

    CPC classification number: H04L7/0008 ,  H04J3/0682

    Abstract: Calibrating return time includes determining clock calibration information based on clock signals local to a master device and return clock signals corresponding to each of at least two slave devices, storing clock calibration information with respect to each of the slave devices with which the master device will communicate using a bus, and, after the clock calibration information has been stored, resynchronizing data signals that are received from each of the slave devices based on the corresponding stored clock calibration information.

    Abstract translation: 校准返回时间包括基于主设备本地的时钟信号确定时钟校准信息，以及对应于至少两个从设备中的每一个的返回时钟信号，存储关于主设备将与之通信的每个从设备的时钟校准信息 使用总线，并且在存储了时钟校准信息之后，基于相应的存储的时钟校准信息重新同步从每个从设备接收的数据信号。

    Digital network
    12.
    发明授权
    Digital network 有权
    数字网络

    公开(公告)号：US06788163B2

    公开(公告)日：2004-09-07

    申请号：US10041546

    申请日：2002-01-07

    Applicant: John R. Benham ,  Rajeevan Amirtharajah

    Inventor： John R. Benham ,  Rajeevan Amirtharajah

    IPC: H01P500

    CPC classification number: H01P5/185

    Abstract: The method of networking comprises connecting a first coupler to a first and second transmission line to couple the first and second transmission lines, connecting a second coupler to the second and a third transmission line to couple the second and third transmission lines, connecting a third coupler to the first and third transmission line to couple the first and third transmission lines, connecting a first end of the first transmission line to a first digital device, connecting a first end of the second transmission line to a second digital device, and connecting a first end of the third transmission line to a third digital device. A signal is transmitted through the first, second, or third transmission line, by one of the digital devices, and is received by at least one digital device different from the transmitting digital device.

    Abstract translation: 联网方法包括将第一耦合器连接到第一和第二传输线以耦合第一和第二传输线，将第二耦合器连接到第二和第三传输线以耦合第二和第三传输线，将第三耦合器 将所述第一和第三传输线耦合到所述第一和第三传输线，将所述第一传输线的第一端连接到第一数字设备，将所述第二传输线的第一端连接到第二数字设备， 第三传输线的端部连接到第三数字设备。 信号通过第一，第二或第三传输线由数字设备中的一个发送，并且由不同于发送数字设备的至少一个数字设备接收。

    Selectively combining signals to produce desired output signal
    13.
    发明授权
    Selectively combining signals to produce desired output signal 有权
    选择性地组合信号以产生期望的输出信号

    公开(公告)号：US06661269B2

    公开(公告)日：2003-12-09

    申请号：US09792497

    申请日：2001-02-23

    Applicant: Thomas D. Simon ,  Rajeevan Amirtharajah

    Inventor： Thomas D. Simon ,  Rajeevan Amirtharajah

    IPC: H03K3017

    CPC classification number: H03K5/1534 ,  H03K5/06 ,  H03K5/13

    Abstract: The present invention provides a mechanism for combining programming signals to provide an output signal, the properties of which depend only on selected properties of the programming signals. An embodiment of the invention includes first and second edge-to-pulse converters. The first edge-to-pulse converter generates an intermediate signal having a width determined by received initiation and termination signals. The second edge-to-pulse converter generates an output signal, responsive to the intermediate signal and the termination signal. The output signal has a width determined by a first edge of the initiation signal and a first edge of the termination signal.

    Abstract translation: 本发明提供了一种用于组合编程信号以提供输出信号的机制，其输出信号的性质仅取决于编程信号的选定属性。 本发明的实施例包括第一和第二边缘到脉冲转换器。 第一边沿脉冲转换器产生具有由接收到的起始和终止信号确定的宽度的中间信号。 第二边沿脉冲转换器响应于中间信号和终止信号而产生输出信号。 输出信号具有由起始信号的第一边缘和终止信号的第一边缘确定的宽度。

    Calibrating return time for resynchronizing data demodulated from a master slave bus
    19.
    发明授权
    Calibrating return time for resynchronizing data demodulated from a master slave bus 失效
    校准从主从总线解调的数据重新同步的返回时间

    公开(公告)号：US06779123B2

    公开(公告)日：2004-08-17

    申请号：US09796344

    申请日：2001-02-28

    Applicant: Thomas D. Simon ,  Rajeevan Amirtharajah

    Inventor： Thomas D. Simon ,  Rajeevan Amirtharajah

    IPC: G06F112

    CPC classification number: H04L7/0008 ,  H04J3/0682

    Abstract: Calibrating return time includes determining clock calibration information based on clock signals local to a master device and return clock signals corresponding to each of at least two slave devices, storing clock calibration information with respect to each of the slave devices with which the master device will communicate using a bus, and, after the clock calibration information has been stored, resynchronizing data signals that are received from each of the slave devices based on the corresponding stored clock calibration information.

    Abstract translation: 校准返回时间包括基于主设备本地的时钟信号确定时钟校准信息，以及对应于至少两个从设备中的每一个的返回时钟信号，存储关于主设备将与之通信的每个从设备的时钟校准信息 使用总线，并且在存储了时钟校准信息之后，基于相应的存储的时钟校准信息重新同步从每个从设备接收的数据信号。

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