公开(公告)号：US5495166A

公开(公告)日：1996-02-27

申请号：US45465

申请日：1993-04-08

Applicant: Roberto Alini ,  Andrea Baschirotto ,  Rinaldo Castello ,  Salvatore Portaluri

Inventor： Roberto Alini ,  Andrea Baschirotto ,  Rinaldo Castello ,  Salvatore Portaluri

IPC: H03F1/30 ,  G05F3/24 ,  H03K17/14 ,  G05F3/16

CPC classification number: G05F3/24 ,  H03K17/145

Abstract: A threshold voltage generator for a field-effect transistor, being of a type adapted to compensate for variations of the threshold voltage from a nominal value, comprising a first amplifier having a first input connected to a current generator; a second amplifier connected ahead of a second input of the first amplifier and having an input connected to another current generator; and a third amplifier connected after the first amplifier and having an output adapted to produce the value of said threshold voltage.

Abstract translation: 一种用于场效应晶体管的阈值电压发生器，其类型适于补偿阈值电压与标称值的变化，包括具有连接到电流发生器的第一输入的第一放大器; 连接在第一放大器的第二输入端的第二放大器，并具有连接到另一电流发生器的输入端; 以及连接在所述第一放大器之后并具有适于产生所述阈值电压值的输出端的第三放大器。

公开(公告)号：US08854319B1

公开(公告)日：2014-10-07

申请号：US12986905

申请日：2011-01-07

Applicant: Paul Nickson ,  Arshad Suhail Farooqui ,  Lee Coleman ,  Muhammad Umair ,  Roberto Alini

Inventor： Paul Nickson ,  Arshad Suhail Farooqui ,  Lee Coleman ,  Muhammad Umair ,  Roberto Alini

IPC: G06F3/041

CPC classification number: H03K17/964 ,  G06F3/016 ,  G06F3/041 ,  H02M3/33507

Abstract: Transducers formed as part of a touchscreen system emulate the motion of a pushbutton or other mechanical elements. A touchscreen system positions a transducer adjacent to an icon displayed on the touchscreen surface. When a user touches the icon, the transducer senses the touch and is then deformed in a pattern that emulates a mechanical motion, giving the user the sensation of touching a mechanical button. An excitation signal applied to the transducer is compared to a target excitation signal that, when applied to the transducer, causes the transducer to emulate the desired motion. When any differences between the two signals are detected, the excitation signal is adjusted so that the motion is corrected. The target excitation signal, or time and voltage segments defining it, are stored in memory and retrieved for comparison. The excitation signal is also selected to reduce any acoustic artifacts that can cause the transducer to generate audible clicks.

Abstract translation: 作为触摸屏系统的一部分形成的传感器模拟按钮或其他机械元件的运动。 触摸屏系统将传感器定位在触摸屏表面上显示的图标附近。 当用户触摸图标时，换能器感测触摸，然后以模拟机械运动的图案变形，给予用户触摸机械按钮的感觉。 将施加到换能器的激励信号与目标激励信号进行比较，当施加到换能器时，其使得换能器模拟期望的运动。 当检测到两个信号之间的任何差异时，调整激励信号以使运动被校正。 目标激励信号或定义它的时间和电压段被存储在存储器中并且被检索用于比较。 还选择激励信号以减少可能导致换能器产生可听见的咔嗒声的任何声学伪影。

公开(公告)号：US20120250462A1

公开(公告)日：2012-10-04

申请号：US13077252

申请日：2011-03-31

Applicant: Luigi Franchini ,  Roberto Alini ,  Filippo Cevini

Inventor： Luigi Franchini ,  Roberto Alini ,  Filippo Cevini

IPC: G01S15/89

CPC classification number: G01S7/52017 ,  A61B8/56 ,  A61B8/587 ,  G01S7/52004 ,  G01S7/52025 ,  G01S15/8906

Abstract: A transceiver for an ultrasonic imaging device includes a transmit circuit and a receive circuit. The transmit circuit outputs test pulses to a probe including a transducer to generate an image of a test object. A composite signal including the test pulses and a reflected signal is output by the transducer. The receive circuit receives the composite signal including the test pulses and the reflected signal and includes a filter circuit. The filter circuit filters the test pulses from the composite signal and passes the reflected signal. An impedance of the filter circuit is equal to substantially zero when the reflected signal is within a predetermined frequency range.

Abstract translation: 用于超声波成像装置的收发器包括发射电路和接收电路。 发射电路将测试脉冲输出到包括换能器的探针以产生测试对象的图像。 包括测试脉冲和反射信号的复合信号由换能器输出。 接收电路接收包括测试脉冲和反射信号的复合信号，并包括滤波电路。 滤波器电路从复合信号中滤出测试脉冲并传递反射信号。 当反射信号在预定频率范围内时，滤波电路的阻抗基本上等于零。

公开(公告)号：US07116539B2

公开(公告)日：2006-10-03

申请号：US10611043

申请日：2003-07-01

Applicant: Vineet Twari ,  Roberto Alini

Inventor： Vineet Twari ,  Roberto Alini

IPC: H02H3/22 ,  H03K3/00

CPC classification number: H03K17/08142 ,  G11B5/012 ,  G11B2005/0013 ,  H03K17/102

Abstract: A driver circuit includes a CMOS stage and switch functionalities for performing certain tasks. One task is to selectively block exposure of the CMOS stage to reference voltage(s). Another task is to selectively protect the CMOS stage during transient operation. Yet another task is to block leakage current from flowing from the CMOS stage to ground.

Abstract translation: 驱动器电路包括用于执行某些任务的CMOS级和开关功能。 一个任务是选择性地阻止CMOS级的参考电压的暴露。 另一个任务是在瞬态操作期间选择性地保护CMOS级。 另一个任务是阻止漏电流从CMOS级流到地。

公开(公告)号：US07035028B2

公开(公告)日：2006-04-25

申请号：US10843823

申请日：2004-05-12

Applicant: Alessandro Venca ,  Roberto Alini ,  Baris Posat

Inventor： Alessandro Venca ,  Roberto Alini ,  Baris Posat

IPC: G11B5/09

CPC classification number: G11B5/09 ,  G11B2005/0016 ,  H02M3/073

Abstract: A write driver driving a write current through a head connected to the write head by an interconnect. The write driver includes a circuit matching output resistance to the odd characteristic impedance of the interconnect and a voltage boosting circuit. The voltage boosting circuit in connected between a high voltage reference or supply voltage and a low voltage reference, and includes a current source, such as a MOS transistor, connected to the input node of a capacitor. During the overshoot duration, the current source operates at saturation to generate a pulsed current with an amplitude of half the load current. The circuit includes another transistor in series with the current generator between the capacitor and the driver output. A forward bias diode is connected between the capacitor output node and high voltage reference and enters reverse bias during overshoot duration swinging the driver output voltage above supply voltage.

Abstract translation: 一个写入驱动器通过一个连接到写入头的头驱动写入电流。 写驱动器包括匹配输出电阻到互连的奇特特性阻抗的电路和升压电路。 连接在高电压基准或电源电压和低电压基准之间的升压电路，并且包括连接到电容器的输入节点的诸如MOS晶体管的电流源。 在过冲持续时间期间，电流源工作在饱和状态以产生具有一半负载电流幅度的脉冲电流。 电路包括与电容器和驱动器输出之间的电流发生器串联的另一个晶体管。 正向偏置二极管连接在电容器输出节点和高电压基准之间，并在驱动器输出电压高于电源电压的过冲持续时间期间进入反向偏置。

公开(公告)号：US06504666B1

公开(公告)日：2003-01-07

申请号：US09651561

申请日：2000-08-30

Applicant: Giuseppe Patti ,  Roberto Alini

Inventor： Giuseppe Patti ,  Roberto Alini

IPC: G11B502

CPC classification number: G11B5/022 ,  G11B5/012 ,  G11B5/02 ,  G11B5/09 ,  G11B2005/0013

Abstract: A method and circuit are disclosed for controlling the write head of a magnetic disk storage device. The circuit includes a pull-up device and a current sink circuits coupled to each terminal of the write head, for selectively sourcing current to and sinking current from the write head, respectively. A clamp device is coupled to each write head terminal to selectively clamp the write head terminals to steady state intermediate voltage levels. The circuit further includes a control circuit for individually activating the pull-up devices, the current sink circuits and the clamp devices. In particular, when reversing the direction of current flow through the write head from a first direction in which current is provided to the write head via the write head terminal to a second direction in which current is drawn from the write head from the write head terminal, the appropriate pull-up device is activated for a predetermined period of time. The clamp device coupled to the temporarily activated pull-up device is thereafter activated to clamp the corresponding write head terminals to the steady state intermediate voltage levels.

Abstract translation: 公开了一种用于控制磁盘存储装置的写入头的方法和电路。 该电路包括耦合到写入头的每个端子的上拉装置和电流吸收电路，用于分别选择性地将电流从写入头提供到和吸收电流。 夹持装置耦合到每个写入头端子，以将写入端子选择性地钳位到稳定的中间电压电平。 电路还包括用于单独激活上拉装置，电流吸收电路和钳位装置的控制电路。 特别地，当将写入头的电流的方向从写入头的第一方向从写入头终端提供到写入头的第一方向反转到来自写入头的写入头的电流的第二方向 ，适当的上拉装置被激活一段预定的时间。 此后激活耦合到临时激活的上拉装置的钳位装置，以将相应的写头终端钳位到稳态中间电压电平。

公开(公告)号：US06252450B1

公开(公告)日：2001-06-26

申请号：US09393058

申请日：1999-09-09

Applicant: Giuseppe Patti ,  Roberto Alini ,  Gilles P. DeNoyer

Inventor： Giuseppe Patti ,  Roberto Alini ,  Gilles P. DeNoyer

IPC: H03K1756

CPC classification number: G11B5/022 ,  G11B5/012 ,  G11B5/02 ,  G11B5/09

Abstract: A method and circuit is disclosed for controlling the write head of a magnetic disk storage device. The circuit includes a pull-up device coupled to a terminal of the write head, for selectively providing a current to the write head through the terminal. The circuit further includes parallel-connected first and second current sink circuits, each of which is coupled to the write head terminal and selectively activated to draw current from the write head via the write head terminal. The circuit further includes a control circuit for individually activating the pull-up device and the first and second current sink circuits. In particular, when reversing the direction of current flow through the write head from a first direction in which current is provided to the write head via the write head terminal to a second direction in which current is drawn from the write head from the write head terminal, both the first and second current sink circuits are activated by the control circuit. When the current in the write head nears the desired destination current level, the second current sink circuit is deactivated and the pull-up device is thereafter immediately activated for a predetermined period of time. The pull-up device is deactivated as the current in the write head approaches a constant value. Due to the deactivation of the second current sink circuit and the temporary activation of the pull-up device, current overshoot and undershoot of the write head current is minimized.

Abstract translation: 公开了一种用于控制磁盘存储装置的写入头的方法和电路。 电路包括耦合到写入头的终端的上拉装置，用于通过终端选择性地向写入头提供电流。 电路还包括并联的第一和第二电流吸收电路，每个电路都耦合到写入头终端，并被选择性地激活以经由写入头终端从写入头抽取电流。 电路还包括用于单独激活上拉装置和第一和第二电流吸收电路的控制电路。 特别地，当将写入头的电流的方向从写入头的第一方向从写入头终端提供到写入头的第一方向反转到来自写入头的写入头的电流的第二方向时 第一和第二电流吸收电路都由控制电路激活。 当写头中的电流接近期望的目的地电流电平时，第二电流吸收电路被去激活，然后上拉装置立即激活预定时间段。 随着写入头中的电流接近恒定值，上拉器件被禁用。 由于第二电流吸收电路的去激活和上拉装置的暂时激活，写头电流的电流过冲和下冲被最小化。

公开(公告)号：US06067198A

公开(公告)日：2000-05-23

申请号：US448047

申请日：1995-05-23

Applicant: Maurizio Zuffada ,  Paolo Gadducci ,  David Moloney ,  Roberto Alini

Inventor： Maurizio Zuffada ,  Paolo Gadducci ,  David Moloney ,  Roberto Alini

IPC: G11B5/09 ,  G11B20/10 ,  G11B5/035 ,  H03H7/30

CPC classification number: G11B5/09 ,  G11B20/10009

Abstract: A device comprises a variable-gain input amplifier, a low-pass analog filter, a transversal continuous-time analog filter, and two distinct and parallel sampling channels interposed between the transversal analog filter and an RLL-NRZ decoder. The two sampling channels each comprise an analog-to-digital converter and a Viterbi detector arranged in series and operating according to sampling sequences that alternate with one another.

Abstract translation: 一种器件包括可变增益输入放大器，低通模拟滤波器，横向连续时间模拟滤波器以及插在横向模拟滤波器和RLL-NRZ解码器之间的两个截然不同和并行的采样通道。 两个采样通道各自包括串联的模数转换器和维特比检测器，并根据彼此交替的采样序列进行操作。

公开(公告)号：US5394112A

公开(公告)日：1995-02-28

申请号：US35329

申请日：1993-03-22

Applicant: Roberto Alini ,  Francesco Rezzi ,  Gianfranco Vai ,  Marco Gregori

Inventor： Roberto Alini ,  Francesco Rezzi ,  Gianfranco Vai ,  Marco Gregori

IPC: H03H11/04 ,  H03H11/54 ,  G05F1/00 ,  G05F5/00

CPC classification number: H03H11/0422 ,  H03F1/302 ,  H03F3/45089 ,  H03F3/45484 ,  H03H11/54 ,  H03F2203/45418 ,  H03F2203/45564 ,  H03F2203/45594 ,  H03F2203/45622 ,  H03F2203/45626 ,  H03F2203/45628 ,  H03F2203/45674 ,  H03F2203/45702

Abstract: An integrated circuit transconductor stage which suppresses the dependence on temperature and production process variables of a differential transconductor stage. A negative feedback relation is used, where the output of the transconductor stage is connected to an additional current generator (which is referenced to a precision external resistor), to a capacitor, and also to the gate of a PMOS transistor which sources current to a polarization stage, which in turn sources current to the transconductor stage, or to multiple transconductor stages.

Abstract translation: 一种集成电路跨导级，其抑制了对差分跨导级的温度和生产工艺变量的依赖。 使用负反馈关系，其中跨导级的输出连接到附加电流发生器（以精密外部电阻器为基准），连接到电容器，以及连接到PMOS晶体管的栅极，PMOS晶体管将电流源源于 偏振级，其反过来将电流输送到跨导级，或者到多个跨导级。

公开(公告)号：US08804457B2

公开(公告)日：2014-08-12

申请号：US13077252

申请日：2011-03-31

Applicant: Luigi Franchini ,  Roberto Alini ,  Filippo Cevini

Inventor： Luigi Franchini ,  Roberto Alini ,  Filippo Cevini

IPC: G01S7/52

CPC classification number: G01S7/52017 ,  A61B8/56 ,  A61B8/587 ,  G01S7/52004 ,  G01S7/52025 ,  G01S15/8906

Abstract: A transceiver for an ultrasonic imaging device includes a transmit circuit and a receive circuit. The transmit circuit outputs test pulses to a probe including a transducer to generate an image of a test object. A composite signal including the test pulses and a reflected signal is output by the transducer. The receive circuit receives the composite signal including the test pulses and the reflected signal and includes a filter circuit. The filter circuit filters the test pulses from the composite signal and passes the reflected signal. An impedance of the filter circuit is equal to substantially zero when the reflected signal is within a predetermined frequency range.

Abstract translation: 用于超声波成像装置的收发器包括发射电路和接收电路。 发射电路将测试脉冲输出到包括换能器的探针以产生测试对象的图像。 包括测试脉冲和反射信号的复合信号由换能器输出。 接收电路接收包括测试脉冲和反射信号的复合信号，并包括滤波电路。 滤波器电路从复合信号中滤出测试脉冲并传递反射信号。 当反射信号在预定频率范围内时，滤波电路的阻抗基本上等于零。