公开(公告)号：US20060189057A1

公开(公告)日：2006-08-24

申请号：US11412270

申请日：2006-04-27

Applicant: Philippe Delpech ,  Christophe Regnier ,  Sebastien Cremer ,  Stephane Monfray

Inventor： Philippe Delpech ,  Christophe Regnier ,  Sebastien Cremer ,  Stephane Monfray

IPC: H01L21/8234

CPC classification number: H01L28/40 ,  H01L21/76264 ,  H01L29/66772 ,  H01L29/78648

Abstract: An integrated electronic circuit with at least at least one passive electronic component and at least one active electronic component. The passive electronic component is formed within an insulating material disposed on a substrate. The active component is formed within a volume of substantially single-crystal semiconductor material disposed on top of the passive component.

Abstract translation: 一种具有至少一个无源电子部件和至少一个有源电子部件的集成电子电路。 被动电子部件形成在设置在基板上的绝缘材料内。 活性组分形成在设置在无源组件顶部上的基本单晶半导体材料的体积内。

公开(公告)号：US20050085026A1

公开(公告)日：2005-04-21

申请号：US10960436

申请日：2004-10-07

Applicant: Stephane Monfray ,  Aomar Halimaoui ,  Philippe Coronel ,  Damien Lenoble ,  Claire Fenouillet-Beranger

Inventor： Stephane Monfray ,  Aomar Halimaoui ,  Philippe Coronel ,  Damien Lenoble ,  Claire Fenouillet-Beranger

IPC: H01L21/762 ,  H01L21/00 ,  H01L21/8234 ,  H01L21/84

CPC classification number: H01L21/76202 ,  H01L21/76251 ,  H01L29/66772 ,  H01L29/78603 ,  H01L29/78606

Abstract: A single-crystal silicon region on insulator on silicon intended to receive at least one component, the insulator having overthicknesses.

Abstract translation: 硅上的绝缘体上的单晶硅区域旨在接收至少一个元件，绝缘体具有厚度。

公开(公告)号：US06724660B2

公开(公告)日：2004-04-20

申请号：US10022185

申请日：2001-12-12

Applicant: Thomas Skotnicki ,  Stephane Monfray ,  Michel Haond

Inventor： Thomas Skotnicki ,  Stephane Monfray ,  Michel Haond

IPC: G11C1604

CPC classification number: H01L29/1054 ,  H01L29/0653 ,  H01L29/803

Abstract: An electronic device, such as an opto-electronic device and an integrated semiconductor memory device, includes at least one integrated memory point structure including a quantum well semiconductor area buried in the substrate of the structure and disposed under the insulated gate of a transistor. A biasing voltage source is adapted to bias the structure to enable charging or discharging of charges in the quantum well or outside the quantum well.

Abstract translation: 诸如光电子器件和集成半导体存储器件的电子器件包括至少一个集成的存储器点结构，其包括埋在该结构的衬底中并设置在晶体管的绝缘栅极之下的量子阱半导体区域。 偏置电压源适于偏置该结构以使能量子阱或量子阱外的电荷的充电或放电。

公开(公告)号：US08847059B2

公开(公告)日：2014-09-30

申请号：US13187071

申请日：2011-07-20

Applicant: Thomas Skotnicki ,  Stephane Monfray

Inventor： Thomas Skotnicki ,  Stephane Monfray

IPC: H01L35/28 ,  H01L35/02 ,  H01L21/329 ,  H01L27/16 ,  H01L35/32 ,  H01L35/34

CPC classification number: H01L35/34 ,  H01L27/16 ,  H01L35/32

Abstract: Electrical energy is generated in a device that includes an integrated circuit which produces thermal flux when operated. A substrate supports the integrated circuit. A structure is formed in the substrate, that structure having a semiconductor p-n junction thermally coupled to the integrated circuit. Responsive to the thermal flux produced by the integrated circuit, the structure generates electrical energy. The generated electrical energy may be stored for use by the integrated circuit.

Abstract translation: 在包括在操作时产生热通量的集成电路的装置中产生电能。 基板支撑集成电路。 在衬底中形成结构，该结构具有热耦合到集成电路的半导体p-n结。 响应于集成电路产生的热通量，结构产生电能。 所产生的电能可以被存储以供集成电路使用。

公开(公告)号：US20120017962A1

公开(公告)日：2012-01-26

申请号：US13187071

申请日：2011-07-20

Applicant: Thomas Skotnicki ,  Stephane Monfray

Inventor： Thomas Skotnicki ,  Stephane Monfray

IPC: H01L35/28 ,  H01L35/02 ,  H01L21/329

CPC classification number: H01L35/34 ,  H01L27/16 ,  H01L35/32

Abstract: Electrical energy is generated in a device that includes an integrated circuit which produces thermal flux when operated. A substrate supports the integrated circuit. A structure is formed in the substrate, that structure having a semiconductor p-n junction thermally coupled to the integrated circuit. Responsive to the thermal flux produced by the integrated circuit, the structure generates electrical energy. The generated electrical energy may be stored for use by the integrated circuit.

Abstract translation: 在包括在操作时产生热通量的集成电路的装置中产生电能。 基板支撑集成电路。 在衬底中形成结构，该结构具有热耦合到集成电路的半导体p-n结。 响应于集成电路产生的热通量，结构产生电能。 所产生的电能可以被存储以供集成电路使用。

公开(公告)号：US20090032874A1

公开(公告)日：2009-02-05

申请号：US12167282

申请日：2008-07-03

Applicant: Nicolas Loubet ,  Didier Dutartre ,  Stephane Monfray

Inventor： Nicolas Loubet ,  Didier Dutartre ,  Stephane Monfray

IPC: H01L21/336 ,  H01L29/786

CPC classification number: H01L27/1203 ,  H01L21/823412 ,  H01L21/823481 ,  H01L21/823807 ,  H01L21/823878 ,  H01L21/84 ,  H01L27/1207

Abstract: A method is provided for fabricating transistors of first and second types in a single substrate. First and second active zones of the substrate are delimited by lateral isolation trench regions, and a portion of the second active zone is removed so that the second active zone is below the first active zone. First and second layers of semiconductor material are formed on the second active zone, so that the second layer is substantially in the same plane as the first active zone. Insulated gates are produced on the first active zone and the second layer. At least one isolation trench region is selectively removed, and the first layer is selectively removed so as to form a tunnel under the second layer. The tunnel is filled with a dielectric material to insulate the second layer from the second active zone of the substrate. Also provided is such an integrated circuit.

Abstract translation: 提供了一种用于在单个衬底中制造第一和第二类型的晶体管的方法。 衬底的第一和第二活性区由横向隔离沟槽区限定，并且去除第二活性区的一部分，使得第二活性区位于第一活性区以下。 第一和第二层半导体材料形成在第二有源区上，使得第二层基本上处于与第一活性区相同的平面。 在第一活性区和第二层产生绝缘栅。 选择性地去除至少一个隔离沟槽区域，并且选择性地去除第一层，以便在第二层下形成隧道。 隧道填充有电介质材料以使第二层与衬底的第二活性区绝缘。 还提供了这种集成电路。

公开(公告)号：US20080087959A1

公开(公告)日：2008-04-17

申请号：US11713553

申请日：2007-03-02

Applicant: Stephane Monfray ,  Aomar Halimaoui ,  Philippe Coronel ,  Damien Lenoble ,  Claire Fenouillet-Beranger

Inventor： Stephane Monfray ,  Aomar Halimaoui ,  Philippe Coronel ,  Damien Lenoble ,  Claire Fenouillet-Beranger

IPC: H01L29/786 ,  H01L21/336

CPC classification number: H01L21/76202 ,  H01L21/76251 ,  H01L29/66772 ,  H01L29/78603 ,  H01L29/78606

Abstract: A single-crystal silicon region on insulator on silicon intended to receive at least one component, the insulator having overthicknesses.

Abstract translation: 硅上的绝缘体上的单晶硅区域旨在接收至少一个元件，绝缘体具有厚度。

公开(公告)号：US20070200198A1

公开(公告)日：2007-08-30

申请号：US11672342

申请日：2007-02-07

Applicant: Thomas Skotnicki ,  Stephane Monfray

Inventor： Thomas Skotnicki ,  Stephane Monfray

IPC: H01L29/00

CPC classification number: H01L45/00 ,  B82Y10/00 ,  H01L29/7613

Abstract: A microelectronic device is provided with at least one transistor or triode with Fowler-Nordheim tunneling current modulation, and supported on a substrate. The triode or the transistor includes at least one first block forming a cathode and at least one second block that forming an anode. The first block and the second block are supported on the substrate, and are separated from each other by a channel insulating zone also supported on the substrate. A gate dielectric zone is supported on at least the channel insulating zone, and a gate is supported on the gate dielectric zone.

Abstract translation: 微电子器件设置有至少一个具有Fowler-Nordheim隧道电流调制的晶体管或三极管，并被支撑在衬底上。 三极管或晶体管包括形成阴极的至少一个第一块和形成阳极的至少一个第二块。 第一块和第二块被支撑在基板上，并且通过也支撑在基板上的沟道绝缘区彼此分离。 栅介质区域至少被支撑在沟道绝缘区上，并且栅极被支撑在栅介质区上。

公开(公告)号：US07196451B2

公开(公告)日：2007-03-27

申请号：US10895616

申请日：2004-07-21

Applicant: Stephane Monfray ,  Pascal Ancey ,  Thomas Skotnicki ,  Karim Segueni

Inventor： Stephane Monfray ,  Pascal Ancey ,  Thomas Skotnicki ,  Karim Segueni

IPC: H02N1/00

CPC classification number: H03H9/2405 ,  H03H2009/02511

Abstract: An electromechanical resonator includes a monocrystalline-silicon substrate (S) provided with an active zone (ZA) delimited by an insulating region, a vibrating beam (10) anchored by at least one of its free ends on the insulating region and including a monocrystalline-silicon vibrating central part (12), and a control electrode (E) arranged above the beam and bearing on the active zone. The central part (12) of the beam is separated from the active zone (ZA) and from the control electrode (E).

Abstract translation: 机电谐振器包括设置有由绝缘区限定的有源区（ZA）的单晶硅衬底（S），由绝缘区上的至少一个自由端锚定的振动束（10），并且包括单晶硅衬底 硅振动中心部分（12）和布置在梁的上方并且承载在活动区上的控制电极（E）。 光束的中心部分（12）与有源区（ZA）和控制电极（E）分离。

公开(公告)号：US20060081876A1

公开(公告)日：2006-04-20

申请号：US11227681

申请日：2005-09-15

Applicant: Stephane Monfray ,  Stephan Borel ,  Thomas Skotnicki

Inventor： Stephane Monfray ,  Stephan Borel ,  Thomas Skotnicki

IPC: H01L31/0328

CPC classification number: H01L29/1054 ,  H01L29/0649 ,  H01L29/66651 ,  H01L29/78654 ,  H01L29/78687

Abstract: The insulated-gate field-effect transistor includes a substrate surmounted by a layer of silicon-germanium alloy, the ratio of the germanium concentration to the silicon concentration of which increases towards the surface of the substrate. The transistor is formed on the active zone in the silicon-germanium alloy layer and lies between two isolating zones. The transistor includes a narrow heterostructure strained-semiconductor channel including a SiGe alloy layer in compression and a silicon layer in tension, extending between the gate and a dielectric block buried in the substrate.

Abstract translation: 绝缘栅场效应晶体管包括由硅 - 锗合金层覆盖的衬底，其锗浓度与硅浓度之比朝衬底表面增加。 晶体管形成在硅 - 锗合金层的有源区上，位于两个隔离区之间。 晶体管包括窄压电晶体半导体通道，其包括压缩的SiGe合金层和张力的硅层，其在栅极和掩埋在衬底中的介质块之间延伸。