公开(公告)号：US06724660B2

公开(公告)日：2004-04-20

申请号：US10022185

申请日：2001-12-12

申请人： Thomas Skotnicki ,  Stephane Monfray ,  Michel Haond

发明人： Thomas Skotnicki ,  Stephane Monfray ,  Michel Haond

IPC分类号： G11C1604

CPC分类号： H01L29/1054 ,  H01L29/0653 ,  H01L29/803

摘要： An electronic device, such as an opto-electronic device and an integrated semiconductor memory device, includes at least one integrated memory point structure including a quantum well semiconductor area buried in the substrate of the structure and disposed under the insulated gate of a transistor. A biasing voltage source is adapted to bias the structure to enable charging or discharging of charges in the quantum well or outside the quantum well.

摘要翻译： 诸如光电子器件和集成半导体存储器件的电子器件包括至少一个集成的存储器点结构，其包括埋在该结构的衬底中并设置在晶体管的绝缘栅极之下的量子阱半导体区域。 偏置电压源适于偏置该结构以使能量子阱或量子阱外的电荷的充电或放电。

公开(公告)号：US20150115769A1

公开(公告)日：2015-04-30

申请号：US14232092

申请日：2012-07-09

申请人： Guillaume Savelli ,  Philippe Coronel ,  Stephane Monfray ,  Thomas Skotnicki

发明人： Guillaume Savelli ,  Philippe Coronel ,  Stephane Monfray ,  Thomas Skotnicki

IPC分类号： F03G7/06 ,  H02N2/18

CPC分类号： F03G7/06 ,  F03G7/065 ,  H01L41/1136 ,  H02N2/18 ,  H02N2/188

摘要： An assembly converting thermal energy into electrical energy including: at least one temperature sensitive bimetallic strip arranged in a space delimited by a hot source and a cold source facing each other, the bimetallic strip extending along a longitudinal axis; at least one suspended element fixed in movement to the sensitive element and extending laterally from the sensitive element and including a free end; and at least one piezoelectric element suspended from a part fixed relative to the sensitive element and vibrated by the suspended element such that it is vibrated when the bimetallic strip changes configuration and the suspended element comes into contact with the piezoelectric element, the piezoelectric element being located outside the space defined between the bimetallic strip and the hot source and outside the space between the bimetallic strip and the cold source.

摘要翻译： 一种将热能转换成电能的组件，包括：至少一个温度敏感的双金属条，布置在由热源和相互面对的冷源界定的空间中，双金属条沿着纵轴延伸; 固定在所述敏感元件上并且从所述敏感元件横向延伸并且包括自由端的至少一个悬挂元件; 以及至少一个压电元件，其从相对于所述敏感元件固定的部分悬挂并由所述悬挂元件振动，使得当所述双金属条改变构型并且所述悬挂元件与所述压电元件接触时，所述压电元件被振动，所述压电元件位于 在双金属条和热源之间限定的空间之外以及双金属条和冷源之间的空间之外。

公开(公告)号：US07892927B2

公开(公告)日：2011-02-22

申请号：US11725160

申请日：2007-03-16

申请人： Stephane Monfray ,  Thomas Skotnicki ,  Didier Dutartre ,  Alexandre Talbot

发明人： Stephane Monfray ,  Thomas Skotnicki ,  Didier Dutartre ,  Alexandre Talbot

IPC分类号： H01L21/336

CPC分类号： H01L29/78684 ,  H01L29/66628 ,  H01L29/66772

摘要： A transistor including a germanium-rich channel. The germanium-rich channel is produced by oxidation of the silicon contained in the silicon-germanium intermediate layer starting from the lower surface of the said intermediate layer. The germanium atoms are therefore caused to migrate towards the upper surface of the silicon-germanium intermediate layer, and are stopped by the gate insulating layer. The migration of the atoms during the oxidation step is thus less prejudicial to the performance of the transistor, since the gate insulator of the transistor has already been produced and is not modified during this step. The migration of the germanium atoms towards the gate insulator, which is immobile, leads to a limitation of the surface defects between the channel and the insulator.

摘要翻译： 包括富含锗的通道的晶体管。 通过从所述中间层的下表面开始的硅 - 锗中间层中包含的硅的氧化产生富锗的通道。 因此锗原子迁移到硅 - 锗中间层的上表面，并被栅极绝缘层阻挡。 因此，在氧化步骤期间原子的迁移对晶体管的性能的影响较小，因为晶体管的栅极绝缘体已经被制造并且在该步骤期间不被修改。 锗原子向固定的栅极绝缘体的迁移导致通道和绝缘体之间的表面缺陷的限制。

公开(公告)号：US08173992B2

公开(公告)日：2012-05-08

申请号：US11672342

申请日：2007-02-07

申请人： Thomas Skotnicki ,  Stephane Monfray

发明人： Thomas Skotnicki ,  Stephane Monfray

IPC分类号： H01L29/06

CPC分类号： H01L45/00 ,  B82Y10/00 ,  H01L29/7613

摘要： A microelectronic device is provided with at least one transistor or triode with Fowler-Nordheim tunneling current modulation, and supported on a substrate. The triode or the transistor includes at least one first block forming a cathode and at least one second block forming an anode. The first block and the second block are supported on the substrate, and are separated from each other by a channel insulating zone also supported on the substrate. A gate dielectric zone is supported on at least the channel insulating zone, and a gate is supported on the gate dielectric zone.

摘要翻译： 微电子器件设置有至少一个具有Fowler-Nordheim隧道电流调制的晶体管或三极管，并被支撑在衬底上。 三极管或晶体管包括形成阴极的至少一个第一块和形成阳极的至少一个第二块。 第一块和第二块被支撑在基板上，并且通过也支撑在基板上的沟道绝缘区彼此分离。 栅介质区域至少被支撑在沟道绝缘区上，并且栅极被支撑在栅介质区上。

公开(公告)号：US20070202644A1

公开(公告)日：2007-08-30

申请号：US11672193

申请日：2007-02-07

申请人： Thomas Skotnicki ,  Stephane Monfray

发明人： Thomas Skotnicki ,  Stephane Monfray

IPC分类号： H01L21/8234 ,  H01L21/8238

CPC分类号： H01L29/66636 ,  H01L21/823418 ,  H01L29/47 ,  H01L29/495 ,  H01L29/66643 ,  H01L29/7839

摘要： This process for manufacturing a Schottky-barrier MOS transistor on a fully depleted semiconductor film may include depositing a first layer of a first sacrificial material on an active zone of the substrate, forming a silicon layer on top of the first layer of sacrificial material, forming a gate region on top of the silicon layer with interposition of a gate oxide layer, and selective etching of the sacrificial material so as to form a tunnel beneath the gate region. The tunnel is filled with a dielectric second sacrificial material. A controlled lateral etching of the second sacrificial material is performed so as to keep behind a zone of dielectric material beneath the gate region. Silicidation is performed at the location of the source region and drain region and at the location of the etched zone.

摘要翻译： 用于在完全耗尽的半导体膜上制造肖特基势垒MOS晶体管的该工艺可以包括在衬底的有源区上沉积第一牺牲材料的第一层，在第一牺牲材料层的顶部上形成硅层，形成 在硅层的顶部具有栅极氧化物层的栅极区域，以及选择性蚀刻牺牲材料，以便在栅极区域下方形成隧道。 隧道填充有电介质第二牺牲材料。 执行第二牺牲材料的受控横向蚀刻，以便保持在栅极区域下方的介电材料区域的后面。 在源极区域和漏极区域以及蚀刻区域的位置进行硅化。

公开(公告)号：US20090152998A1

公开(公告)日：2009-06-18

申请号：US12266471

申请日：2008-11-06

申请人： Nicolas Abele ,  Pascal Ancey ,  Alexandre Talbot ,  Karim Segueni ,  Guillaume Bouche ,  Thomas Skotnicki ,  Stephane Monfray ,  Fabrice Cassett

发明人： Nicolas Abele ,  Pascal Ancey ,  Alexandre Talbot ,  Karim Segueni ,  Guillaume Bouche ,  Thomas Skotnicki ,  Stephane Monfray ,  Fabrice Cassett

IPC分类号： H01L41/00 ,  H01L21/20

CPC分类号： H03H9/2405 ,  H03H3/0072 ,  H03H2009/02496

摘要： A microresonator comprising a single-crystal silicon resonant element and at least one activation electrode placed close to the resonant element, in which the resonant element is placed in an opening of a semiconductor layer covering a substrate, the activation electrode being formed in the semiconductor layer and being level at the opening.

摘要翻译： 一种微谐振器，包括单晶硅谐振元件和靠近谐振元件放置的至少一个激活电极，其中谐振元件放置在覆盖衬底的半导体层的开口中，激活电极形成在半导体层中 并在开幕式的水平。

公开(公告)号：US20050199970A1

公开(公告)日：2005-09-15

申请号：US10895616

申请日：2004-07-21

申请人： Stephane Monfray ,  Pascal Ancey ,  Thomas Skotnicki ,  Karim Segueni

发明人： Stephane Monfray ,  Pascal Ancey ,  Thomas Skotnicki ,  Karim Segueni

IPC分类号： B81B3/00 ,  H03H9/24 ,  H01L27/14

CPC分类号： H03H9/2405 ,  H03H2009/02511

摘要： An electromechanical resonator includes a monocrystalline-silicon substrate (S) provided with an active zone (ZA) delimited by an insulating region, a vibrating beam (10) anchored by at least one of its free ends on the insulating region and including a monocrystalline-silicon vibrating central part (12), and a control electrode (E) arranged above the beam and bearing on the active zone. The central part (12) of the beam is separated from the active zone (ZA) and from the control electrode (E).

摘要翻译： 机电谐振器包括设置有由绝缘区限定的有源区（ZA）的单晶硅衬底（S），由绝缘区上的至少一个自由端锚定的振动束（10），并且包括单晶硅衬底 硅振动中心部分（12）和布置在梁的上方并且承载在活动区上的控制电极（E）。 光束的中心部分（12）与有源区（ZA）和控制电极（E）分离。

公开(公告)号：US20080020532A1

公开(公告)日：2008-01-24

申请号：US11725160

申请日：2007-03-16

申请人： Stephane Monfray ,  Thomas Skotnicki ,  Didier Dutartre ,  Alexandre Talbot

发明人： Stephane Monfray ,  Thomas Skotnicki ,  Didier Dutartre ,  Alexandre Talbot

IPC分类号： H01L21/336

CPC分类号： H01L29/78684 ,  H01L29/66628 ,  H01L29/66772

摘要： A transistor including a germanium-rich channel. The germanium-rich channel is produced by oxidation of the silicon contained in the silicon-germanium intermediate layer starting from the lower surface of the said intermediate layer. The germanium atoms are therefore caused to migrate towards the upper surface of the silicon-germanium intermediate layer, and are stopped by the gate insulating layer. The migration of the atoms during the oxidation step is thus less prejudicial to the performance of the transistor, since the gate insulator of the transistor has already been produced and is not modified during this step. The migration of the germanium atoms towards the gate insulator, which is immobile, leads to a limitation of the surface defects between the channel and the insulator.

摘要翻译： 包括富含锗的通道的晶体管。 通过从所述中间层的下表面开始的硅 - 锗中间层中包含的硅的氧化产生富锗的通道。 因此锗原子迁移到硅 - 锗中间层的上表面，并被栅极绝缘层阻挡。 因此，在氧化步骤期间原子的迁移对晶体管的性能的影响较小，因为晶体管的栅极绝缘体已经被制造并且在该步骤期间不被修改。 锗原子向固定的栅极绝缘体的迁移导致通道和绝缘体之间的表面缺陷的限制。

公开(公告)号：US07229867B2

公开(公告)日：2007-06-12

申请号：US11050411

申请日：2005-02-03

申请人： Thomas Skotnicki ,  Daniel Chanemougame ,  Stephane Monfray

发明人： Thomas Skotnicki ,  Daniel Chanemougame ,  Stephane Monfray

IPC分类号： H01L21/338

CPC分类号： H01L29/66787 ,  H01L29/66772 ,  H01L29/78603

摘要： A substrate supporting a portion of a semiconductor material is used to produce a field-effect transistor. A portion of a temporary material lies between the portion of semiconductor material and the substrate. A gate is formed, which comprises an upper part in rigid connection with the portion of semiconductor material, and at least one bearing part settled on the substrate. The temporary material is removed and replaced with an electrically insulating material. During removal and replacement of the temporary material, the portion of semiconductor material is held in place relative to the substrate by the gate.

摘要翻译： 使用支撑半导体材料的一部分的衬底来制造场效应晶体管。 临时材料的一部分位于半导体材料的部分和基板之间。 形成栅极，其包括与半导体材料的该部分刚性连接的上部以及沉积在基板上的至少一个承载部分。 将临时材料取出并用电绝缘材料代替。 在移除和更换临时材料期间，半导体材料的部分通过栅极相对于衬底保持就位。

公开(公告)号：US06537894B2

公开(公告)日：2003-03-25

申请号：US09920315

申请日：2001-08-01

申请人： Thomas Skotnicki ,  Michel Haond ,  Didier Dutartre

发明人： Thomas Skotnicki ,  Michel Haond ,  Didier Dutartre

IPC分类号： H01L2176

CPC分类号： H01L21/76264 ,  H01L21/76283

摘要： Processes are provided for fabricating a substrate having a silicon-on-insulator (SOI) or silicon-on-nothing (SON) architecture, which are applicable to the manufacture of semiconductor devices, especially transistors such as those of the MOS, CMOS, BICMOS, and HCMOS types. In the fabrication processes, a multilayer stack is grown on a substrate by non-selective full-wafer epitaxy. The multilayer stack includes a silicon layer on a Ge or SiGe layer. Active regions are defined and masked, and insulating pads are formed so as to be located around the perimeter of each of the active regions at predetermined intervals and placed against the sidewalls of the active regions. The insulating trenches are etched, and the SiGe or Ge layer is laterally etched so as to form an empty tunnel under the silicon layer. The trenches are filled with a dielectric. In the case of an SOI archiutecture, the tunnel is filled with a dielectric.