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公开(公告)号：US4635048A
公开(公告)日：1987-01-06
申请号：US698877
申请日：1985-02-06
CPC分类号： G09G5/024
摘要： A video display controller which can display foregrounds as well as backgrounds of display patterns on a screen of a video display unit in a plurality of colors. The video display controller comprises a plurality of color information registers, in each of which a pair of color code data representative of foreground and background colors of one display pattern are stored. A memory is provided for storing a plurality of pattern data, a plurality of pattern name data each designating one of the display patterns to be displayed on a respective one of display portions of the screen, and a plurality of color selection data each corresponding to a respective one of the display portions. A sequence controller sequentially reads the pattern data designated by the pattern name data and the color selection data in accordance with synchronization signals. A color selection control logic circuit selects one of the color information registers in accordance with the color selection data read from the memory, and reads one of the pair of color code data from the selected color information register. A color signal generator generates a color signal in accordance with the color code data read from the register and supplies it to the video display unit.
摘要翻译： 一种视频显示控制器，其可以以多种颜色在视频显示单元的屏幕上显示前景以及显示图案的背景。 视频显示控制器包括多个颜色信息寄存器，每个颜色信息寄存器中存储代表一个显示图案的前景和背景颜色的一对颜色代码数据。 提供存储多个图案数据的存储器，多个图案名称数据，每个图案名称数据指定要显示在屏幕的相应一个显示部分上的显示图案之一，以及多个颜色选择数据，每个对应于 相应的一个显示部分。 序列控制器根据同步信号顺序地读取由图案名称数据和颜色选择数据指定的图案数据。 颜色选择控制逻辑电路根据从存储器读取的颜色选择数据来选择一个颜色信息寄存器，并从所选择的颜色信息寄存器中读取一对颜色代码数据中的一个。 颜色信号发生器根据从寄存器读取的颜色代码数据产生颜色信号，并将其提供给视频显示单元。
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公开(公告)号：US4587878A
公开(公告)日：1986-05-13
申请号：US626610
申请日：1984-07-06
申请人： Akira Nakada , Takatoshi Okumura , Kotaro Mizuno
发明人： Akira Nakada , Takatoshi Okumura , Kotaro Mizuno
CPC分类号： G10H1/0041 , G10H1/38 , G10H2210/616 , G10H2220/215 , Y10S84/12 , Y10S84/22 , Y10S84/29
摘要： An automatic performing apparatus for use in an electronic musical instrument stores chord name data and chord generation timing data to carry out an automatic chord performance. In spite of frequent variations of a chord during the progression of a music piece, repetitive storage of a same chord name data is not required so that the amount of stored data can be reduced, allowing utilization of a memory of a small capacity.
摘要翻译： 用于电子乐器的自动执行装置存储和弦名称数据和和弦生成定时数据，以执行自动和弦演奏。 尽管在乐曲进行期间频率变化的和弦，不需要重复地存储相同的和弦名称数据，从而可以减少存储的数据量，从而允许利用小容量的存储器。
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公开(公告)号：US4377960A
公开(公告)日：1983-03-29
申请号：US145111
申请日：1980-04-30
申请人： Takatoshi Okumura
发明人： Takatoshi Okumura
CPC分类号： G10H7/06 , G10H1/08 , G10H2250/545
摘要： An electronic musical instrument includes a plurality of address generators for producing address signals corresponding to different tones each varying at a rate synchronous with the frequency of each of the different tones, a waveform memory device including a plurality of addresses for storing at respective addresses a plurality of waveform sample values that constitute a waveform, a circuit for sequentially supplying one after another of the address signals to the waveform memory device to read out the waveform in different rates in a time division multiplexed manner for different tones, and musical tone forming circuits for forming musical tones in accordance with the time division multiplexed waveform outputs of the waveform memory device.
摘要翻译： 电子乐器包括多个地址发生器，用于产生对应于不同音调的地址信号，每个音调以与每个不同音调的频率同步的速率变化;波形存储装置，包括多个地址，用于在各个地址处存储多个 构成波形的波形采样值的电路，用于将波形存储器件逐个依次提供给波形存储器件的电路，以不同音调的时分复用方式读出不同速率的波形;以及乐音形成电路， 根据波形存储装置的时分复用波形输出形成乐音。
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公开(公告)号：USRE31090E
公开(公告)日：1982-11-30
申请号：US221578
申请日：1980-12-31
申请人： Eiichi Yamaga , Akira Nakada , Takatoshi Okumura , Eiichiro Aoki , Akiyoshi Oya , Yasuji Uchiyama
发明人： Eiichi Yamaga , Akira Nakada , Takatoshi Okumura , Eiichiro Aoki , Akiyoshi Oya , Yasuji Uchiyama
IPC分类号： G10H1/18
CPC分类号： G10H1/187
摘要： A tone production assignment circuit produces control information representing assigned key code, key-on etc. Such information has a large number of bits with respect to each channel. A multiplexing circuit has output lines the number of which is smaller than the bit number of the information and divides the information with a plurality of time slots with respect to one channel. The multiplexing circuit is controlled by a signal from a timing signal generation circuit. The multiplexing circuit is capable of rearranging information for transmitting information required for the respective individual channels and also capable of inserting a timing data in an available time slot. A multiple data analysis circuit decodes the information provided by the multiplexing circuit. Tone generators are provided for the respective channels and each one of them functions to latch only corresponding information among the decoded information by a latch circuit.
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公开(公告)号：US4192211A
公开(公告)日：1980-03-11
申请号：US929007
申请日：1978-07-28
申请人： Eiichi Yamaga , Akira Nakada , Takatoshi Okumura , Eiichiro Aoki , Akiyoshi Oya , Yasuji Uchiyama
发明人： Eiichi Yamaga , Akira Nakada , Takatoshi Okumura , Eiichiro Aoki , Akiyoshi Oya , Yasuji Uchiyama
CPC分类号： G10H1/187
摘要： A tone production assignment circuit produces control information representing assigned key code, key-on etc. Such information has a large number of bits with respect to each channel. A multiplexing circuit has output lines the number of which is smaller than the bit number of the information and divides the information with a plurality of time slots with respect to one channel. The multiplexing circuit is controlled by a signal from a timing signal generation circuit. The multiplexing circuit is capable of rearranging information for transmitting information required for the respective individual channels and also capable of inserting a timing data in an available time slot. A multiple data analysis circuit decodes the information provided by the multiplexing circuit. Tone generators are provided for the respective channels and each one of them functions to latch only corresponding information among the decoded information by a latch circuit.
摘要翻译： 音调产生分配电路产生表示分配的键码，键控等的控制信息。这样的信息相对于每个频道具有大量的位。 复用电路具有数量小于信息的位数的输出线，并且相对于一个通道将信息与多个时隙分开。 复用电路由来自定时信号发生电路的信号控制。 复用电路能够重新排列用于发送各个信道所需的信息的信息，并且还能够在可用时隙中插入定时数据。 多重数据分析电路解码复用电路提供的信息。 为每个通道提供音频发生器，并且每个声道发生器用于仅通过锁存电路锁存解码信息中的对应信息。
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公开(公告)号：US4179972A
公开(公告)日：1979-12-25
申请号：US841716
申请日：1977-10-13
摘要： In an electronic musical instrument, the keys of a keyboard are divided into a plurality of groups by octaves, and a wave generator is provided with a memory for storing constants corresponding to musical tone frequencies to be generated according to the notes includes in a desired group out of the plurality of group, an accumulator for repeatedly adding the constants read out of the memory, and a bit position shifting circuit for shifting the bit position of the data produced by the accumulator according to the octave range of a note to be produced, thereby to obtain the data varying repeatedly according to the frequency of a note to be produced, and to reduce the storing capacity of the memory when compared to the number of keys.
摘要翻译： 在电子乐器中，键盘的键被按八度分成多个组，并且波发生器设置有存储器，用于存储对应于根据笔记生成的乐音频率的常数包括在期望组中 在多个组中，用于反复添加从存储器读出的常数的累加器和用于根据要产生的音符的八度音程移动由累加器产生的数据的位位置的位位置移位电路， 从而获得根据要产生的音符的频率重复变化的数据，并且与键数相比减小存储器的存储容量。
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公开(公告)号：US08409101B2
公开(公告)日：2013-04-02
申请号：US12815825
申请日：2010-06-15
申请人： Hironobu Hongou , Takatoshi Okumura , Kazuhito Nakata , Kenichi Unayama , Takeshi Fukasawa , Takayuki Shiina , Fumio Mochizuki
发明人： Hironobu Hongou , Takatoshi Okumura , Kazuhito Nakata , Kenichi Unayama , Takeshi Fukasawa , Takayuki Shiina , Fumio Mochizuki
IPC分类号： A61B8/14
CPC分类号： A61B8/14 , A61B8/546 , G10K11/004
摘要： According to one embodiment, an ultrasonic probe includes a probe unit and cooling unit. The probe unit is obtained by arranging, in a housing, a transducer unit which transmits and receives ultrasonic waves with an object to be examined, an electronic circuit unit which is connected to the transducer unit and performs electrical signal processing, and a heat transfer member which is made of a material having a heat transfer coefficient higher than that of the electronic circuit unit, and transfers heat of the electronic circuit unit to a housing surface. The cooling unit is detachably mounted on the housing of the probe unit, and cools the heat transfer member by passing a coolant in a channel formed inside the cooling unit.
摘要翻译： 根据一个实施例，超声波探头包括探针单元和冷却单元。 探针单元通过在外壳中布置与被检查物体发送和接收超声波的换能器单元，连接到换能器单元并进行电信号处理的电子电路单元，以及传热构件 其由具有高于电子电路单元的传热系数的材料制成，并且将电子电路单元的热量传递到壳体表面。 冷却单元可拆卸地安装在探针单元的壳体上，并且通过在冷却单元内形成的通道中使冷却剂通过来冷却传热构件。
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公开(公告)号：US4737772A
公开(公告)日：1988-04-12
申请号：US739036
申请日：1985-05-29
摘要： A video display processor (VDP) produces a video signal by which a black and white image of an increased gradation can be displayed on a video display unit. The VDP reads from a video RAM (VRAM) either color codes each representative of a color of each display element, or amplitude data representative of amplitudes of a video signal to be reproduced. When displaying an image based on the color codes, the color codes are converted by a color palette circuit into color data each composed of three primary color data, and then supplied to a digital color encoder. The digital color encoder multiplies each of the three color data by predetermined coefficients at proper phase timings to output data representative of three chrominance signals. This output data is summed by an adder circuit and then converted into an analog signal to be supplied to the video display unit as the video signal. When displaying an image based on the amplitude data, the color palette circuit converts the amplitude data into gradation data. The digital color encoder multiplies the gradation data by other proper coefficients so that data proportional in value to the gradation data are obtained at the output of the adder circuit. This data is converted into an analog signal to thereby reproduce the video signal.
摘要翻译： 视频显示处理器（VDP）产生视频信号，通过该视频信号可以在视频显示单元上显示增加灰度的黑白图像。 VDP从视频RAM（VRAM）读取每个代表每个显示元件的颜色的颜色代码，或表示要再现的视频信号的幅度的幅度数据。 当基于颜色代码显示图像时，颜色代码由调色板电路转换成每个由三个基色数据组成的颜色数据，然后提供给数字颜色编码器。 数字彩色编码器以适当的相位定时将三个颜色数据中的每一个乘以预定系数，以输出表示三个色度信号的数据。 该输出数据由加法器电路求和，然后转换为模拟信号，以供应给视频显示单元作为视频信号。 当基于幅度数据显示图像时，调色板电路将振幅数据转换为灰度数据。 数字彩色编码器将灰度数据乘以其他适当的系数，使得在加法器电路的输出处获得与灰度数据成比例的数据。 该数据被转换成模拟信号从而再现视频信号。
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公开(公告)号：US4628467A
公开(公告)日：1986-12-09
申请号：US735370
申请日：1985-05-17
申请人： Kazuhiko Nishi , Takatoshi Ishii , Ryozo Yamashita , Shigemitsu Yamaoka , Takatoshi Okumura , Minoru Morimoto
发明人： Kazuhiko Nishi , Takatoshi Ishii , Ryozo Yamashita , Shigemitsu Yamaoka , Takatoshi Okumura , Minoru Morimoto
摘要： A video display control system comprises a video display processor (VDP) which is capable of accessing to a video RAM (VRAM) at an extremely high-speed. The VRAM used in this system comprises first and second dynamic RAMs each having an address input terminal to which row address data and column address data are supplied, a row address strobe input terminal, a column address strobe input terminal, and a data input/output terminal. The row address data is latched at the leading edge of a row address strobe signal applied to the row address strobe input terminal, while the column address data is latched at the leading edge of a column address strobe signal applied to the column address strobe input terminal. An access to an address of each dynamic RAM is established when both of the row and column address data are latched. The VDP comprises a VRAM interface for controlling an access to the first and second dynamic RAMs which is connected to the RAMs through a common address bus. The VRAM interface first outputs row address data together with a row address strobe signal RAS and then outputs column address data together with two column address strobe signals CAS0 and CAS1 which are rendered active in sequence and supplied to the first and second dynamic RAMs, respectively.
摘要翻译： 视频显示控制系统包括能够以极高速度访问视频RAM（VRAM）的视频显示处理器（VDP）。 该系统中使用的VRAM包括第一和第二动态RAM，每个具有地址输入端，行地址数据和列地址数据被提供给地址输入端，行地址选通输入端，列地址选通输入端和数据输入/输出 终奌站。 行地址数据被锁存在施加到行地址选通输入端的行地址选通信号的前沿，而列地址数据被锁存在施加到列地址选通输入端的列地址选通信号的前沿 。 当锁存行和列地址数据时，建立对每个动态RAM的地址的访问。 VDP包括用于控制通过公共地址总线连接到RAM的第一和第二动态RAM的访问的VRAM接口。 VRAM接口首先将行地址数据与行地址选通信号和上拉和下拉一起输出，然后将列地址数据与两个列地址选通信号和上拉和C和＆amp;上拉和C依次输出并提供给第一和第二动态RAM ， 分别。
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公开(公告)号：US4437379A
公开(公告)日：1984-03-20
申请号：US315110
申请日：1981-10-26
申请人： Takatoshi Okumura
发明人： Takatoshi Okumura
CPC分类号： G10H7/06
摘要： Keys of a keyboard are divided into a plurality of tone ranges and a plurality of musical tone waveforms regarding specific ones of the divided tone ranges are stored in a waveform memory device. A number of the plurality of musical tone waveforms is smaller than the number of the divided tone ranges. An address signal generator is provided which generates an address signal having a repetition period corresponding to a tone pitch of a depressed key and supplies the address signal to the waveform memory device, and an arithmetic operating circuit is provided which selects ones from among the plurality of musical tone waveforms and mixes the selected ones of a mixing ratio, thereby forming a new musical tone waveform. The selected ones and the mixing ratio are predetermined corresponding to each of the tone ranges. Different tone colors of a number which is more than the number of the waveforms are realized for the respective tone ranges just like in a natural musical instrument.
摘要翻译： 键盘的键被分成多个音调范围，并且关于特定的分频乐音范围的多个音乐波形被存储在波形存储装置中。 多个乐音波形的数量小于分频乐谱的数量。 提供一种地址信号发生器，其生成具有与被按压的键的音调相对应的重复周期的地址信号，并将该地址信号提供给波形存储装置，并且提供算术运算电路，其从多个 乐音波形并混合所选择的混合比，从而形成新的乐音波形。 所选择的和混合比是对应于每个音调范围预定的。 与自然乐器一样，对于各个音调范围实现多于波形数量的数字的不同音色。
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