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59 条记录 (耗时 0.018 秒)

    Test assistant system for logical design process
    11.
    发明授权
    Test assistant system for logical design process 失效
    用于逻辑设计过程的测试助理系统

    公开(公告)号：US5282146A

    公开(公告)日：1994-01-25

    申请号：US694136

    申请日：1991-05-01

    申请人： Masami Aihara ,  Masatoshi Sekine ,  Tsutomu Takei ,  Hiroaki Nishi ,  Kazuyoshi Kohno ,  Takeshi Kitahara ,  Atsushi Masuda

    发明人： Masami Aihara ,  Masatoshi Sekine ,  Tsutomu Takei ,  Hiroaki Nishi ,  Kazuyoshi Kohno ,  Takeshi Kitahara ,  Atsushi Masuda

    IPC分类号： G06F11/25 ,  G01R31/3183 ,  G06F17/50 ,  G06F15/60

    CPC分类号： G01R31/318357 ,  G01R31/318307 ,  G06F17/5022

    摘要： Disclosed is a test assistant system for a logical design process comprising a description storage data base for storing statements expressing logical functions of circuit components to be tested, a compiler for compiling the statements to output object data, a data base for storing the object data, a test pattern generator for generating test patterns by using the object data stored in the data base, a test pattern data base for storing the test patterns, each having a level number, a simulator for executing a simulation for the logical function by using the test patterns stored in the test pattern data base, and a display for displaying the object data, the test patterns, the information used in the simulation, and relationships among them. The data base comprises a region for storing a statement correspondence table expressing statements as descriptions of the logical functions of the circuit components, a region for storing a circuit component table expressing a circuit component corresponding to the function described in the statement, a region for storing a dependent relationship table expressing the dependent relationship between the statements, and a correspondence relationship table expressing the correspondence relationship between the statement correspondence table and the circuit component table.

    摘要翻译： 公开了一种用于逻辑设计过程的测试辅助系统，包括用于存储表示要测试的电路组件的逻辑功能的语句的描述存储数据库，用于编译语句以输出对象数据的编译器，用于存储对象数据的数据库， 用于通过使用存储在数据库中的对象数据来生成测试模式的测试模式发生器，用于存储测试模式的测试模式数据库，每个具有级别号码，用于通过使用测试执行用于逻辑功能的模拟的模拟器 存储在测试模式数据库中的模式，以及用于显示对象数据，测试模式，模拟中使用的信息以及它们之间的关系的显示。 数据库包括用于存储表示语句的语句对应表的区域，作为对电路组件的逻辑功能的描述的区域，用于存储表示对应于语句中描述的功能的电路组件的电路组件表的区域，用于存储 表示语句之间的依赖关系的依赖关系表和表示语句对应表与电路分量表之间的对应关系的对应关系表。

    Block access system using cache memory
    12.
    发明授权
    Block access system using cache memory 失效
    使用高速缓存的块访问系统

    公开(公告)号：US4853848A

    公开(公告)日：1989-08-01

    申请号：US163911

    申请日：1988-03-03

    申请人： Masato Mitsuhashi ,  Takeshi Kitahara

    发明人： Masato Mitsuhashi ,  Takeshi Kitahara

    IPC分类号： G06F12/08 ,  G06F13/12

    CPC分类号： G06F12/0879

    摘要： A block access system using a cache memory comprises a first control circuit for producing a block access request for requesting read-out of all data included in a block of a predetermined size in response to an access request from an operation unit and inputting the data read out from a main memory unit into a cache memory, and a second control circuit for reading out data from the main memory unit and sending back to the first control circuit a response signal which indicates any one of execution and cancellation of the requested block access in response to the block access request from the first control means. Memory addresses necessary for reading out all the data in one block are produced by the first control circuit when the block access request is cancelled. Alternatively, memory addresses are supplied by the second control circuit when the block access request is executed.