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公开(公告)号:US12300510B2
公开(公告)日:2025-05-13
申请号:US17806730
申请日:2022-06-13
Applicant: Tokyo Electron Limited
Inventor: Chun-Huai Li , Chi-Wen Chen
IPC: H01L21/00 , H01L21/322 , H01L29/20 , H01L29/205 , H01L29/66 , H01L29/778
Abstract: A method for manufacturing a semiconductor device includes the following steps. A channel layer and a barrier layer are sequentially formed on a substrate by an epitaxial process to form a semiconductor device. The channel layer includes a first III-V compound and the barrier layer includes a second III-V compound. The semiconductor device is disposed within a cavity. A high-pressure fluid is introduced into the cavity to perform a passivation treatment on defects of the semiconductor device with the high-pressure fluid. The high-pressure fluid is doped with a compound composed of at least one of nitrogen, oxygen, and fluorine.
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公开(公告)号:US12300469B2
公开(公告)日:2025-05-13
申请号:US18510680
申请日:2023-11-16
Applicant: Tokyo Electron Limited
Inventor: Shinsuke Oka
Abstract: In a plasma processing apparatus, a mounting table includes a heater for adjusting a temperature of a mounting surface mounting thereon a consumable part consumed by plasma processing. A heater control unit controls a supply power to the heater such that the heater reaches a setting temperature. A measurement unit measures, while controlling the supply power to the heater such that the temperature of the heater becomes constant, the supply powers in a non-ignition state where plasma is not ignited and in a transient state where the supply power is decreased after the plasma is ignited. A parameter calculation unit calculates a thickness of the consumable part by performing fitting with a calculation model, which has the thickness of the consumable part as a parameter and calculates the supply power in the transient state, by using the measured supply powers in the non-ignition state and in the transient state.
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公开(公告)号:US12297539B2
公开(公告)日:2025-05-13
申请号:US17821844
申请日:2022-08-24
Applicant: Tokyo Electron Limited
Inventor: Syuji Nozawa , Tatsuya Yamaguchi
IPC: C23C16/52 , B05D1/00 , C23C16/44 , C23C16/455 , C23C16/458 , C23C16/48
Abstract: A film forming system includes: a film forming apparatus which includes a processing container, a stage provided in the processing container, a structure provided in the processing container and having recesses, and a window provided on a wall surface of the processing container; a measurement device which includes a light emitter, a light receiver, and a measurer configured to measure a light reflectance for each wavelength in the structure based on an intensity of light emitted to the structure and an intensity of light reflected from the structure; and a control device which includes an estimator configured to estimate a thickness of a film formed on a substrate based on the light reflectance for each wavelength in the structure, and a controller configured to stop film formation on the substrate when the estimated thickness of the film reaches a predetermined thickness.
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公开(公告)号:US20250149316A1
公开(公告)日:2025-05-08
申请号:US19004463
申请日:2024-12-30
Applicant: Tokyo Electron Limited
Inventor: Naoki MATSUMOTO , Toshihisa OZU , Satoru NAKAMURA , Yusuke SHIMIZU
IPC: H01J37/32
Abstract: A technology for reducing variation in an ion flux distribution will be provided. There is provided a plasma processing method for performing plasma processing in a plasma processing apparatus including a chamber and a substrate support disposed in the chamber, the plasma processing performed on a substrate placed at the substrate support by generating plasma in the chamber. The plasma processing method includes: (a) the step of storing, in memory, first distribution data that is data relating to a distribution of an ion flux that occurs between the plasma generated in the chamber and a first substrate placed at the substrate support; (b-a) the step of placing a second substrate at the substrate support; and (b-b) a plasma processing step of generating the plasma in the chamber based on the first distribution data to perform the plasma processing on the second substrate.
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公开(公告)号:US20250149300A1
公开(公告)日:2025-05-08
申请号:US19015772
申请日:2025-01-10
Applicant: Tokyo Electron Limited
Inventor: Tangkuei WANG , Tetsuya OHISHI , Masafumi URAKAWA , Shinya MORIKITA
IPC: H01J37/32
Abstract: In a plasma processing apparatus disclosed, a controller performs repetition of a cycle. The cycle includes supplying a pulse of a source high-frequency power from a high-frequency power supply for generating plasma from gas in a chamber, and supplying a pulse of an electric bias to a substrate support from a bias power supply. The pulse of the electric bias includes a direct current voltage pulse periodically generated at a bias frequency of 1 MHz or less. A repetition frequency of the cycle is 5 kHz or more. A start timing of the pulse of the electric bias is simultaneous with or earlier than a stop timing of the pulse of the source high-frequency power. A stop timing of the pulse of the electric bias is later than the stop timing of the pulse of the source high-frequency power.
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公开(公告)号:US20250149296A1
公开(公告)日:2025-05-08
申请号:US19001893
申请日:2024-12-26
Applicant: Tokyo Electron Limited
Inventor: Chishio KOSHIMIZU
IPC: H01J37/32
Abstract: A plasma processing apparatus includes a chamber, a substrate support, a gas supplier for supplying gas into the chamber, a radio-frequency power supply for supplying a source radio-frequency power to generate plasma, and a bias power supply for generating electric bias. During a first processing period, the radio-frequency power supply uses frequencies, which are included in a first frequency set determined to reduce a degree of reflection of the source radio-frequency power from a load, as source frequencies of the source radio-frequency power for each of phase periods in a waveform period of the electric bias. During a second processing period, the radio-frequency power supply uses frequencies, which are included in a second frequency set different from the first frequency set and determined to reduce the degree of reflection, as the source frequencies for each of the phase periods.
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公开(公告)号:US20250140590A1
公开(公告)日:2025-05-01
申请号:US18921728
申请日:2024-10-21
Applicant: Tokyo Electron Limited
Inventor: Toshiaki KODAMA , Tatsuru Okamura
IPC: H01L21/68 , G05B19/418 , H01L21/687
Abstract: Provided is a teaching method for teaching a transfer position of a consumable member in a cassette included in a substrate processing system, the substrate processing system having a transfer device configured to transfer the consumable member, and a storage module where the cassette accommodating a plurality of the consumable members is set; the teaching method comprising the steps of: (A) recognizing setting of the cassette in the storage module; and (B) after the step (A), detecting the cassette by a sensor of the transfer device and calculating three-dimensional coordinates of the cassette based on detection information of the sensor.
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公开(公告)号:US12288713B2
公开(公告)日:2025-04-29
申请号:US17107678
申请日:2020-11-30
Applicant: TOKYO ELECTRON LIMITED
Inventor: Yasuharu Sasaki , Daiki Satoh , Akira Nagayama
IPC: H01L21/683 , H01J37/32 , H01L21/67 , H01L21/687
Abstract: A mounting table, to which a voltage is applied, includes an electrostatic chuck having a mounting surface for mounting a target object and a rear surface opposite to the mounting surface, the electrostatic chuck having a first through-hole formed in the mounting surface; a base, which is in contact with the rear surface of the electrostatic chuck, having a second through-hole communicating with the first through-hole; a cylindrical spacer inserted in the second through-hole; and a pin accommodated in the first through-hole and the spacer. Gaps are formed between the pin and inner walls of the first through-hole and the spacer, and the gap between the first through-hole and the pin is greater than the gap between the spacer and the pin.
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公开(公告)号:US12288692B2
公开(公告)日:2025-04-29
申请号:US17721014
申请日:2022-04-14
Applicant: TOKYO ELECTRON LIMITED
Inventor: Yun Han , Alok Ranjan , Peter Ventzek , Andrew Metz , Hiroaki Niimi
Abstract: A method for manufacturing a FET semiconductor structure includes providing a substrate comprising at least one source/drain contact of at least one FET, the at least one source/drain contact formed adjacent to a dummy gate of the at least one FET. A TiSi2 film with C54 structure is selectively deposited directly on and fully covering the at least one source/drain contact relative to a vertical sidewall of a gate spacer between the at least one source/drain contact and the dummy gate. The dummy gate is replaced with a replacement metal gate.
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公开(公告)号:US12288676B2
公开(公告)日:2025-04-29
申请号:US17337696
申请日:2021-06-03
Applicant: Tokyo Electron Limited
Inventor: Takayuki Ishii , Kazuya Nagaseki , Michishige Saito
IPC: H01J37/32 , H01L21/683 , H01L21/687
Abstract: A stage includes a first member made of a material having a density of 5.0 g/cm3 or less, and a second member joined to the first member. The second member is made of a material having a linear expansion coefficient of 5.0×10−6/K or less and a thermal conductivity of 100 W/mK or more. A flow passage for a temperature control medium is formed in at least one of the first member and the second member.
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