Bucketized hash tables with remap entries

    公开(公告)号:US10706101B2

    公开(公告)日:2020-07-07

    申请号:US15438401

    申请日:2017-02-21

    Abstract: Methods and mechanisms for managing data in a hash table are disclosed. A computing system includes a hash table configured to store data and hash management logic. In response to receiving a request to insert data into the hash table, the hash management logic is configured to generate a first hash value by applying a first hash function to the key of the key-value pair, and identify a first bucket within the hash table that corresponds to the first hash table. If the first bucket has a slot available, store the key-value pair in the slot. If the first bucket does not have a slot available, select a first slot of the first bucket for conversion to a remap entry, store the key-value pair in a second bucket, and store information associating the key-value pair with the second bucket in the remap entry.

    USER-LEVEL INSTRUCTION FOR MEMORY LOCALITY DETERMINATION

    公开(公告)号:US20170228164A1

    公开(公告)日:2017-08-10

    申请号:US15040848

    申请日:2016-02-10

    CPC classification number: G06F12/10 G06F12/0802 G06F2212/60

    Abstract: Systems and methods for efficiently processing data in a non-uniform memory access (NUMA) computing system are disclosed. A computing system includes multiple nodes connected in a NUMA configuration. Each node includes a processing unit which includes one or more processors. A processor in a processing unit executes an instruction that identifies an address corresponding to a data location. The processor determines whether a memory device stores data corresponding to the address. A response is returned to the processor. The response indicates whether the memory device stores data corresponding to the address. The processor completes processing of the instruction without retrieving the data.

    MEMORY OPERATION ENCRYPTION
    16.
    发明申请

    公开(公告)号:US20170201503A1

    公开(公告)日:2017-07-13

    申请号:US14993455

    申请日:2016-01-12

    Abstract: A processing system includes a processing module having a first interface coupleable to an interconnect. The first interface includes a first cryptologic engine to encrypt a representation of store data of a store operation and a memory address using a first key and a first feedback-based cryptologic process to generate first encrypted data and an encrypted memory address. A memory module includes a second interface coupled to the interconnect. The second interface includes a second cryptologic engine to decrypt the first encrypted data and the encrypted memory address using a second key and a second feedback-based cryptologic process to generate a copy of the representation of the store data and a copy of the memory address. The second interface further is to store the copy of the representation of the store data to a memory location of the memory core based on the copy of the memory address.

    METHOD AND APPARATUS FOR PERFORMING A PARALLEL SEARCH OPERATION

    公开(公告)号:US20170147608A1

    公开(公告)日:2017-05-25

    申请号:US14948892

    申请日:2015-11-23

    Inventor: Dong Ping Zhang

    Abstract: A method and apparatus for performing a search in a processor-in-memory (PIM) system having a first processor and at least one memory module includes receiving one or more images by the first processor. The first processor sends a query for a search of memory for a matching image to the one or more images to at least one memory module, which searches memory in the memory module, in response to the received query. The at least one memory module sends the results of the search to the first processor, and the first processor performs a comparison of the received results from the at least one memory module to the received one or more images.

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