公开(公告)号：US11069605B2

公开(公告)日：2021-07-20

申请号：US16399909

申请日：2019-04-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung Huang

IPC: H01L23/498 ,  H01L25/065 ,  H01L21/48 ,  H01L25/00

Abstract: A wiring structure includes at least one upper conductive structure, a lower conductive structure and an intermediate layer. The upper conductive structure includes at least one upper dielectric layer, at least one upper circuit layer in contact with the upper dielectric layer, and at least one bonding portion electrically connected to the upper circuit layer. The lower conductive structure includes at least one lower dielectric layer and at least one lower circuit layer in contact with the lower dielectric layer. The intermediate layer is disposed between the upper conductive structure and the lower conductive structure and bonding the upper conductive structure and the lower conductive structure together. The upper conductive structure is electrically connected to the lower conductive structure.

公开(公告)号：US11923274B2

公开(公告)日：2024-03-05

申请号：US18071595

申请日：2022-11-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung Huang

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/66

CPC classification number: H01L23/481 ,  H01L23/66 ,  H01L24/05 ,  H01L24/89

Abstract: The subject application discloses a substrate. The substrate includes a first conductive layer, a first bonding layer, a first dielectric layer, and a conductive via. The first bonding layer is disposed on the first conductive layer. The first dielectric layer is disposed on the first bonding layer. The conductive via penetrates the first dielectric layer and is electrically connected with the first conductive layer.

公开(公告)号：US11515234B2

公开(公告)日：2022-11-29

申请号：US17111335

申请日：2020-12-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung Huang

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/66

Abstract: The subject application discloses a substrate. The substrate includes a first conductive layer, a first bonding layer, a first dielectric layer, and a conductive via. The first bonding layer is disposed on the first conductive layer. The first dielectric layer is disposed on the first bonding layer. The conductive via penetrates the first dielectric layer and is electrically connected with the first conductive layer.

公开(公告)号：US11309295B2

公开(公告)日：2022-04-19

申请号：US16551180

申请日：2019-08-26

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung Huang ,  Wen Chieh Yang

IPC: H01L23/13 ,  H01L25/16 ,  H01L23/538 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  H01L21/683

Abstract: A semiconductor device package includes a first passive component having a first surface and a second passive component having a second surface facing the first surface of the first passive component. The first surface has a recessing portion and the second surface includes a protruding portion within the recessing portion of the first surface of the first passive component. A contour of the protruding portion and a contour of the recessing portion are substantially matched. A method of manufacturing a semiconductor device package is also disclosed.

公开(公告)号：US11264340B2

公开(公告)日：2022-03-01

申请号：US16696819

申请日：2019-11-26

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung Huang

IPC: H01L23/64 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48

Abstract: A capacitor structure includes a first metal layer, a first metal oxide layer, a second metal oxide layer, a first conductive member, a second conductive member and a metal composite structure. The first metal layer has a first surface and a second surface opposite the first surface. The first metal oxide layer is formed on the first surface of the first metal layer. The second metal oxide layer is formed on the second surface of the first metal layer. The first conductive member penetrates through the capacitor structure and is electrically isolated from the first metal layer. The second conductive member is electrically connected to the first metal layer. The metal composite structure is disposed between the second conductive member and the first metal layer.

公开(公告)号：US11211316B1

公开(公告)日：2021-12-28

申请号：US17030170

申请日：2020-09-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung Huang

IPC: H01L23/498 ,  H01L21/48

Abstract: A wiring structure and a method for manufacturing the same are provided. The wiring structure includes a conductive structure and at least one conductive through via. The conductive structure includes a plurality of dielectric layers and a plurality of circuit layers in contact with the dielectric layers. The conductive through via extends through at least a portion of the conductive structure. At least one of the circuit layers includes a first portion in contact with the conductive through via and a second portion in contact with the dielectric layer. A surface roughness of the first portion of the circuit layer is greater than a surface roughness of the second portion of the circuit layer.

公开(公告)号：US11075188B2

公开(公告)日：2021-07-27

申请号：US16528319

申请日：2019-07-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung Huang

IPC: H01L23/48 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/522 ,  H01L25/00 ,  H01L23/538 ,  H01L21/56

Abstract: A package structure includes a plurality of lower elements, a reinforcement structure and an encapsulant. The lower elements are disposed side by side. The reinforcement structure surrounds the lower elements. The encapsulant covers the lower elements and the reinforcement structure. The electrical connectors of the lower elements are exposed from the encapsulant.

公开(公告)号：US11062985B2

公开(公告)日：2021-07-13

申请号：US16529562

申请日：2019-08-01

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung Huang

IPC: H01L23/12 ,  H01L23/48 ,  H01L21/4763 ,  H01L23/498 ,  H01L21/3205 ,  H05K3/46 ,  H05K3/42 ,  H01L23/522 ,  H01L23/495 ,  H01L21/768 ,  H01L23/528

Abstract: A wiring structure includes an upper conductive structure, a lower conductive structure, a plurality of metallic structures and an intermediate layer. The upper conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The lower conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The metallic structures are disposed between the upper conductive structure and the lower conductive structure, and electrically connecting the upper conductive structure and the lower conductive structure. The intermediate layer is disposed between the upper conductive structure and the lower conductive structure, and covers the metallic structures.

公开(公告)号：US11031326B2

公开(公告)日：2021-06-08

申请号：US16802478

申请日：2020-02-26

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung Huang ,  Chien-Mei Huang ,  Yan Wen Chung

IPC: H01L25/065 ,  H01L23/498 ,  H01L23/00 ,  H01L21/48

Abstract: A wiring structure includes an insulating layer and a conductive structure. The insulating layer has an upper surface and a lower surface opposite to the upper surface, and defines an opening extending through the insulating layer. The conductive structure is disposed in the opening of the insulating layer, and includes a first barrier layer and a wetting layer. The first barrier layer is disposed on a sidewall of the opening of the insulating layer, and defines a through hole extending through the first barrier layer. The wetting layer is disposed on the first barrier layer. A portion of the wetting layer is exposed from the through hole of the first barrier layer and the lower surface of the insulating layer to form a ball pad.

公开(公告)号：US10892213B2

公开(公告)日：2021-01-12

申请号：US16236207

申请日：2018-12-28

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung Huang ,  Li-Yu Hsieh ,  Yan Wen Chung

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/66 ,  H01L23/544 ,  H01L21/683 ,  H05K3/40 ,  H05K3/36 ,  H01L23/00

Abstract: A wiring structure includes an upper conductive structure, a lower conductive structure, an adhesion layer and at least one outer via. The upper conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The lower conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The adhesion layer is interposed between the upper conductive structure and the lower conductive structure to bond the upper conductive structure and the lower conductive structure together. The outer via extends through at least a portion of the upper conductive structure and the adhesion layer, and electrically connected to the circuit layer of the lower conductive structure.