公开(公告)号：US11188142B1

公开(公告)日：2021-11-30

申请号：US16216545

申请日：2018-12-11

Applicant: Amazon Technologies, Inc.

Inventor： Christopher James BeSerra ,  David Edward Bryan ,  Gavin Akira Ebisuzaki ,  Michael Jon Moen ,  Roey Rivnay

IPC: G06F1/32 ,  G06F1/3296 ,  H05K7/14 ,  G06F1/3206

Abstract: A rules-based mechanism is described for powering down racks in an ordered and autonomous way in a data center. Power shelf controllers (PSCs), on different racks or on the same rack, communicate together through a network, called the PSC network, separate from the data network. The PSCs are aware of the other PSCs that share the same input power domain. When the racks are configured for use, each PSC is assigned a priority value, based upon the management provisioning layer assignment. Each PSC creates a table of all the other PSCs and tracks each assigned priority value. When a power event occurs, the PSC can power down components within the rack in accordance with the priority table. Recovery can also be carried out in conformance with the priority table.

公开(公告)号：US11042496B1

公开(公告)日：2021-06-22

申请号：US15282487

申请日：2016-09-30

Applicant: Amazon Technologies, Inc.

Inventor： Christopher James BeSerra ,  Kypros Constantinides ,  Uwe Dannowski ,  Nafea Bshara ,  Matthew Shawn Wilson

IPC: G06F13/40 ,  G06F13/42

Abstract: Provided are systems and methods for enabling peer-to-peer communications between peripheral devices. In various implementations, a computing system can include a PCI switch device. The first PCI switch device can include a first port and be communicatively coupled to a first root complex port. The first PCI switch device can have access to a first PCI endpoint address range. The computing system can further include a second PCI switch device. The second PCI switch device can include a second port, connected to the first port. The second PCI switch device can be communicatively coupled to a second root complex port that is different from the first root complex port. The second PCI switch device can receive a transaction addressed to the first PCI endpoint address range, and identify the transaction as associated with the second port. The second PCI switch device can subsequently transmit the transaction using the second port.

公开(公告)号：US11036543B1

公开(公告)日：2021-06-15

申请号：US16441616

申请日：2019-06-14

Applicant: Amazon Technologies, Inc.

Inventor： Robert Charles Swanson ,  Christopher James BeSerra

IPC: G06F9/48 ,  G06F9/455 ,  G06F11/07 ,  G06F13/10 ,  G06F9/4401 ,  G06F9/54

Abstract: Systems and methods for an integrated reliability, availability, and serviceability (RAS) state machine are provided. Handling of RAS events by the Basic Input Output System (BIOS) of an integrated circuit device can result in lost processing time on the processing cores of a multi-core processor resulting from numerous system management interrupts generated by the BIOS. To reduce lost processing time, a dedicated state machine can execute instructions to handle RAS events independently of the BIOS and minimize the number of system management interrupts.

公开(公告)号：US10896266B1

公开(公告)日：2021-01-19

申请号：US16034188

申请日：2018-07-12

Applicant: Amazon Technologies, Inc.

Inventor： Christopher James BeSerra ,  Gavin Akira Ebisuzaki ,  Ahmed Mohammed Shihab

IPC: G06F21/73 ,  H04L29/06 ,  G06F21/57

Abstract: Provided are systems and methods for hardware attestation. Hardware attestation can ensure that only trusted hardware components are being used in a computing system. In various implementations, the computing system can include a hardware component coupled to the motherboard, where the hardware component is independent of the main processor of the computing system. The hardware component can determine whether a particular component connected to the motherboard includes an identification code, where the identification code can be used to attest to an identity of the particular component. The hardware component can further determining whether the identification code matches an expected value. The hardware component can further configure the particular component based on whether the identification code matches the expected value.

公开(公告)号：US10599504B1

公开(公告)日：2020-03-24

申请号：US14746544

申请日：2015-06-22

Applicant: Amazon Technologies, Inc.

Inventor： Christopher James BeSerra ,  Gary S. Shankman ,  Gavin Akira Ebisuzaki ,  Terry Lee Nissley

IPC: G06F11/07 ,  G11C11/406 ,  G11C29/44 ,  G11C29/04 ,  G11C29/52 ,  G11C29/00 ,  G06F11/10

Abstract: The following description is directed to dynamically adjusting a refresh rate. In one example, a method can include determining a rate of memory errors, and dynamically adjusting a refresh rate of a memory based at least partially on the determined rate of memory errors.

公开(公告)号：US10437754B1

公开(公告)日：2019-10-08

申请号：US15274524

申请日：2016-09-23

Applicant: Amazon Technologies, Inc.

Inventor： Gavin Akira Ebisuzaki ,  Vijay Patel ,  Christopher James BeSerra

IPC: G06F13/24 ,  G06F13/16 ,  G06T1/60

Abstract: A management controller may request units of diagnostic information from a BIOS of the management controller's host computing device. The management controller may trigger an interrupt, in response to which the BIOS, by the execution of a processor of the host, may cause the diagnostic information to be copied to a video memory of the management controller. Upon the completion of the interrupt handler, a graphics controller of the management controller may cause the diagnostic information to be transferred to a non-volatile memory, and transferred out-of-band to a client device.

公开(公告)号：US10255151B1

公开(公告)日：2019-04-09

申请号：US15384031

申请日：2016-12-19

Applicant: Amazon Technologies, Inc.

Inventor： Alex Levin ,  Christopher James BeSerra ,  Ron Diamant

IPC: G06F11/22 ,  G06F11/30

Abstract: A smart add-in card can be leveraged to perform testing on a host server computer. The add-in card can include an embedded processor and memory. Tests can be downloaded to the add-in card to test a protocol under which the add-in card operates. In a particular example, a PCIe communication bus couples the motherboard to the add-in card and the tests can purposely violate the PCIe specification. The tests can be developed to test conditions that are typically difficult to test without the use of special hardware. However, the smart add-in card can be a simple Network Interface Card (NIC) that resides on the host server computer during normal operation and is used for communication other than security testing. By using the NIC as a testing device, repeatable and reliable testing can be obtained.