公开(公告)号：US20070252641A1

公开(公告)日：2007-11-01

申请号：US11380799

申请日：2006-04-28

申请人： Kenneth Goodnow ,  Joseph Iadanza ,  Edward Nowak ,  Douglas Stout

发明人： Kenneth Goodnow ,  Joseph Iadanza ,  Edward Nowak ,  Douglas Stout

IPC分类号： G05F1/10

CPC分类号： H01L29/42384 ,  H01L21/823842 ,  H01L21/823857 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/4908 ,  H01L29/785 ,  H01L29/78645 ,  H01L29/78648

摘要： A voltage divider device includes a double gate field effect transistor (FET) having a first gate and a second gate disposed at opposite sides of a body region. An input voltage is coupled between the first and second gates, and an output voltage is taken from at least one of a source of the FET and a drain of the FET, wherein the output voltage represents a divided voltage with respect to the input voltage.

摘要翻译： 分压器件包括具有第一栅极的双栅极场效应晶体管（FET）和设置在主体区域的相对侧的第二栅极。 输入电压耦合在第一和第二栅极之间，并且输出电压取自FET的源极和FET的漏极中的至少一个，其中输出电压表示相对于输入电压的分压。

公开(公告)号：US20080030254A1

公开(公告)日：2008-02-07

申请号：US11847362

申请日：2007-08-30

申请人： Igor Arsovski ,  Joseph Iadanza

发明人： Igor Arsovski ,  Joseph Iadanza

IPC分类号： H03K17/16

CPC分类号： H03K19/00346 ,  H03K17/162

摘要： A design structure for eliminating step response power supply perturbation during voltage island power-up/power-down on an integrated circuit is disclosed. An IC chip communicates with a primary power supply and includes at least one voltage island. A primary header on the voltage island of the chip communicates with the primary power supply via a primary header power path. A secondary header on the voltage island of the chip communicates with a secondary power supply via a secondary header power path. A control decoder communicating with the IC chip and the voltage island regulates the state of the primary and secondary headers.

摘要翻译： 公开了一种用于在集成电路上的电压岛上电/掉电期间消除阶跃响应电源扰动的设计结构。 IC芯片与主电源通信并且包括至少一个电压岛。 芯片的电压岛上的主要头部通过主头电源路径与主电源通信。 芯片的电压岛上的次级标题通过辅助电源通路与二次电源通信。 与IC芯片和电压岛通信的控制解码器调节主集线器和副集线器的状态。

公开(公告)号：US20050040841A1

公开(公告)日：2005-02-24

申请号：US10604844

申请日：2003-08-21

申请人： Joseph Iadanza

发明人： Joseph Iadanza

IPC分类号： G01R31/28 ,  G01R31/317 ,  G01R31/40 ,  H01L21/822 ,  H01L27/04 ,  G01R31/36

CPC分类号： G01R31/40 ,  G01R31/31721

摘要： A voltage regulated power supply test circuit including: a voltage regulator electrically connected to at least one regulated voltage node of a functional circuit of an integrated circuit chip; and means for selectively connecting between one of the at least one regulated voltage nodes and ground with at least one load circuit adapted to put an emulated current load of the functional circuit on the regulated voltage supply.

摘要翻译： 一种电压调节电源测试电路，包括：电连接到集成电路芯片的功能电路的至少一个调节电压节点的电压调节器; 以及用于选择性地将所述至少一个调节电压节点中的一个与地之间的至少一个负载电路连接的装置，所述负载电路适于将所述功能电路的仿真电流负载置于所述稳压电源上。

公开(公告)号：US06683345B1

公开(公告)日：2004-01-27

申请号：US09467537

申请日：1999-12-20

申请人： Eric Adler ,  James S. Dunn ,  Joseph Iadanza ,  Jenifer E. Lary ,  Kent E. Morrett ,  Josef S. Watts

发明人： Eric Adler ,  James S. Dunn ,  Joseph Iadanza ,  Jenifer E. Lary ,  Kent E. Morrett ,  Josef S. Watts

IPC分类号： H01L2976

CPC分类号： H01L29/8605 ,  H01L21/823412 ,  H01L21/823481 ,  H01L27/0802 ,  H01L29/78 ,  H03M1/0604 ,  H03M1/66

摘要： A semiconductor device having a conduction channel which is electrically modulated. A trench structure is formed within a substrate enclosing a diffusion region. The trench structure isolates the devices formed within the diffusion region from the remaining portion of the substrate. The trench walls are made thin enough so that the width of the channel within a diffusion region may be controlled by applying an electrical potential between a trench wall and the substrate. Transistors formed within the trench structure have a conduction channel width controlled by the applied voltage permitting the gain of the transistor to be matched with the gain of other transistors on the substrate.

摘要翻译： 具有电调制的导电通道的半导体器件。 在包围扩散区域的衬底内形成沟槽结构。 沟槽结构将形成在扩散区域内的器件与衬底的剩余部分隔离。 沟壁被制成足够薄，使得扩散区域内的通道的宽度可以通过在沟槽壁和衬底之间施加电势来控制。 形成在沟槽结构内的晶体管具有由所施加的电压控制的导通沟道宽度，允许晶体管的增益与衬底上的其它晶体管的增益匹配。