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11.发明申请公开(公告)号：US20210265510A1
公开(公告)日：2021-08-26
申请号：US17254851
申请日：2020-04-08
Inventor： Yingbin HU , Ce ZHAO , Yuankui DING , Wei SONG , Liusong NI , Xuechao SUN , Chaowei HAO , Liangchen YAN
IPC: H01L29/786 , H01L27/12 , H01L21/02 , H01L29/66
Abstract: The disclosure provides a thin film transistor, a manufacturing method thereof, a display substrate and a display apparatus. The thin film transistor comprises a base substrate, and an active layer disposed on the base substrate, and the active layer comprises a channel region, and a source contact region and a drain contact region respectively positioned at two sides of the channel region; and a portion of at least one of the source contact region and the drain contact region close to the channel region includes a plurality of first sub-grooves disposed at a side of the active layer proximal to the base substrate and a plurality of second sub-grooves disposed at a side of the active layer distal to the base substrate, and the plurality of first sub-grooves and the plurality of second sub-grooves being alternately disposed along a direction parallel to an extension of the channel region.
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12.发明申请公开(公告)号：US20210225886A1
公开(公告)日：2021-07-22
申请号：US16936447
申请日：2020-07-23
Inventor： Qinghe WANG , Tongshang SU , Yongchao HUANG , Yingbin HU , Yang ZHANG , Haitao WANG , Ning LIU , Guangyao LI , Zheng WANG , Yu JI , Jinliang HU , Wei SONG , Jun CHENG , Liangchen YAN
IPC: H01L27/12 , H01L29/786 , H01L29/24 , H01L29/66
Abstract: A thin film transistor, a display panel and a preparation method thereof and a display apparatus are provided. The thin film transistor includes: a substrate; a gate metal located on a side of the substrate; a gate insulating layer located on a side of the gate metal away from the substrate; an active layer located on a side of the gate insulating layer away from the substrate; a first metal oxide and a second metal oxide which are located on a side of the active layer away from the substrate and are arranged on a same layer; and a source metal and a drain metal which are located on sides of the first metal oxide and the second metal oxide away from the substrate and are arranged in a same layer.
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13.发明申请公开(公告)号：US20200161196A1
公开(公告)日：2020-05-21
申请号：US16452952
申请日：2019-06-26
Inventor： Yingbin HU , Ce ZHAO , Yuankui DING , Wei SONG , Jun WANG , Yang ZHANG , Wei LI , Liangchen YAN
IPC: H01L21/66 , H01L29/66 , H01L21/44 , H01L21/467 , G03F7/20
Abstract: The present disclosure provides a method for determining a width-to-length ratio of a channel region of a thin film transistor (TFT). The method includes: S1, setting an initial width-to-length ratio of the channel region; S2, manufacturing a TFT by using a mask plate according to the initial width-to-length ratio; S3, testing the TFT manufactured according to the initial width-to-length ratio; S4, determining whether or not the test result satisfies a predetermined condition, performing S5 if the test result satisfies the predetermined condition, and performing S6 if the test result does not satisfy the predetermined condition; S5, determining the initial width-to-length ratio as the width-to-length ratio of the channel region of the TFT; S6, changing the value of the initial width-to-length ratio, adjusting a position of the mask plate according to the changed initial width-to-length ratio, and performing S2 to S4 again.
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公开(公告)号：US20200067012A1
公开(公告)日：2020-02-27
申请号：US16409419
申请日：2019-05-10
Inventor： Tongshang SU , Dongfang WANG , Qinghe WANG , Ce ZHAO , Bin ZHOU , Liangchen YAN
Abstract: A display back plate, a fabricating method for the same, and a display device are provided. The display back plate includes a substrate, a transparent heat conduction layer disposed on the substrate, and an array structure layer disposed on the heat conduction layer. The array structure layer includes a light shielding layer, a first thin film transistor, and a second thin film transistor, where the light shielding layer is disposed between the transparent heat conduction layer and the first thin film transistor.
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15.发明申请公开(公告)号：US20200035841A1
公开(公告)日：2020-01-30
申请号：US16429528
申请日：2019-06-03
Inventor： Tongshang SU , Dongfang WANG , Qinghe WANG , Liangchen YAN
IPC: H01L29/786 , H01L27/12 , H01L29/66
Abstract: A TFT and a method for manufacturing the TFT, an array substrate, and a display device are provided. An active layer of the TFT includes a channel region, a first conductive region and a second conductive region, and the channel region is arranged between the first conductive region and the second conductive region. The channel region includes a first side and a second side, the first side is opposite to the second side, the first side is in contact with a third side of the first conductive region, the second side is in contact with a fourth side of the second conductive region, and a length of the first side is greater than a length of the third side.
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Patent Agency Ranking
16.发明申请公开(公告)号：US20180190831A1
公开(公告)日：2018-07-05
申请号：US15529645
申请日：2016-05-19
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Meili WANG , Liangchen YAN
IPC: H01L29/786 , H01L29/49 , H01L29/66 , H01L21/3213 , H01L27/12
CPC classification number: H01L29/78675 , H01L21/32136 , H01L27/1222 , H01L27/1248 , H01L27/1262 , H01L29/42384 , H01L29/4908 , H01L29/66757 , H01L29/78618
Abstract: The present disclosure provides a Thin Film Transistor and a method for manufacturing the same, an array substrate and a display device, so as to increase on-state currents of the Thin Film Transistor and improve current characteristics of the Thin Film Transistor. The Thin Film Transistor includes a base substrate, a gate insulating layer and a gate disposed above the base substrate; wherein a conductive layer is also disposed between the gate insulating layer and the gate; wherein the projection of the conductive layer on the base substrate is larger than the projection of the gate on the base substrate.
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17.发明申请THIN FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE 审中-公开薄膜晶体管阵列基板及其制造方法及显示装置公开(公告)号：US20150311223A1
公开(公告)日：2015-10-29
申请号：US14406326
申请日：2014-05-27
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Fengjuan LIU , Meili WANG , Li ZHANG , Liangchen YAN
IPC: H01L27/12 , H01L21/283 , H01L21/308 , H01L29/417 , H01L29/40 , H01L29/423 , H01L29/786 , H01L21/28 , H01L29/66
CPC classification number: H01L27/124 , H01L21/28008 , H01L21/283 , H01L21/3081 , H01L27/1259 , H01L29/401 , H01L29/41733 , H01L29/42384 , H01L29/4908 , H01L29/66742 , H01L29/66969 , H01L29/786 , H01L29/7869
Abstract: A thin film transistor array substrate and a manufacturing method thereof, and a display device comprising the thin film transistor array substrate, including a gate electrode (4) within a gate electrode recess of a first insulating layer (2), so that the gate electrode (4) is surrounded by the first insulating layer (2), the patterned gate electrode (4) has no slope, and the first insulating layer (2) isolates the gate electrode (4) from the outside, which can prevent fracture of the gate insulating layer (5), and further effectively block copper diffusion in the thin film transistor array substrate. Further, the metal blocking layer completely covers an upper surface and/or a lower surface of the composite copper metal or the composite thin film layer including copper metal, which can play a good role in blocking copper diffusion; meanwhile, above all, it is not necessary to etch copper, which reduces cost and improves yield.
Abstract translation: 一种薄膜晶体管阵列基板及其制造方法，以及包括薄膜晶体管阵列基板的显示装置，其包括在第一绝缘层（2）的栅电极凹部内的栅电极（4），使得栅电极 （4）被第一绝缘层（2）包围，图案化栅电极（4）没有斜坡，第一绝缘层（2）将栅电极（4）与外部隔离，这可以防止 栅极绝缘层（5），并进一步有效地阻挡薄膜晶体管阵列基板中的铜扩散。 此外，金属阻挡层完全覆盖复合铜金属或包含铜金属的复合薄膜层的上表面和/或下表面，其可以在阻止铜扩散方面发挥良好的作用; 同时，最重要的是，不需要蚀刻铜，从而降低成本并提高产量。
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公开(公告)号：US20240389430A1
公开(公告)日：2024-11-21
申请号：US17921329
申请日：2021-11-09
Inventor： Ning LIU , Qinghe WANG , Jun LIU , Hao YIN , Bin ZHOU , Liangchen YAN
IPC: H10K59/80 , H10K50/11 , H10K59/12 , H10K59/124
Abstract: Provided is a display panel. The display panel includes a substrate; and an insulating layer disposed on the substrate, and an auxiliary electrode, a light-emitting layer, and a cathode layer that are stacked in sequence, the insulating layer being provided with a first via, and the auxiliary electrode and the cathode layer being lapped with each other in the first via; wherein an opening in a side, distal from the substrate, of the first via is of a polygonal shape, and the light-emitting layer forms a broken line at each edge of the opening.
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公开(公告)号：US20240373702A1
公开(公告)日：2024-11-07
申请号：US18689267
申请日：2022-06-02
Inventor： Yingbin HU , Ca ZHAO , Ming WANG , Shun WANG , Jiawen SONG , Yang XIA , Dongdong ZHANG , Yang ZHANG , Liangchen YAN , Ning LIU
IPC: H10K59/131 , H10K59/12 , H10K59/126 , H10K59/80 , H10K71/60
Abstract: A display panel and a method for manufacturing a display panel, and a display apparatus are provided. The display panel includes a substrate, a driving layer and a light-emitting layer, the driving layer includes a plurality of groups of pixel circuits, the source-drain metal layer of the driving layer includes an auxiliary electrode located on a side of a group of pixel circuits; the light-emitting layer includes a light-emitting device and a transition structure, a second electrode of the light emitting device covers at least a part of the transition structure and is connected to the auxiliary electrode.
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公开(公告)号：US20240315089A1
公开(公告)日：2024-09-19
申请号：US18277814
申请日：2021-11-19
Inventor： Jun LIU , Yongchao HUANG , Li SUN , Haidong WANG , Yuxuan MA , Bin ZHOU , Liangchen YAN
IPC: H10K59/124 , H10K59/12 , H10K59/131
CPC classification number: H10K59/124 , H10K59/1201 , H10K59/131
Abstract: A display device, and a display panel and a manufacturing method therefor, relating to the technical field of display. The display panel includes a substrate, a driver layer, a barrier structure, and a light-emitting layer covering the driver layer and the barrier structure and being discontinuously at least at a barrier groove of the barrier structure. The barrier structure includes a support layer, a barrier layer and a second protective layer. The barrier layer is in a different area of a same film layer than a wiring layer of the driver layer, and a side wall of the barrier layer is provided with the barrier groove surrounding the driver layer. The second protective layer is on a surface of the barrier layer away from the substrate and in a different area of a same protective film than a first protective layer of the driver layer.
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