Biphenyldiphosphine compounds
    11.
    发明申请
    Biphenyldiphosphine compounds 有权
    联苯二膦化合物

    公开(公告)号:US20050014633A1

    公开(公告)日:2005-01-20

    申请号:US10888820

    申请日:2004-07-09

    申请人: Albert Chan Liqin Qiu

    发明人: Albert Chan Liqin Qiu

    摘要: The present invention provides compounds of the formula wherein R is optionally substituted lower alkyl, cycloalkyl or aryl; R′ is alkyl or aryl; n is zero or an integer of 1 or 2; or an enantiomer thereof; or an enantiomeric mixture thereof. The compounds of formula (I) are bridged C2-symmetric biphenyldiphosphine analogs and, thus, may be employed as ligands to generate chiral transition metal catalysts which may be applied in a variety of asymmetric reactions. The compounds of the present invention are easily accessible in high diastereomeric and optical purity according to the methods disclosed herein.

    摘要翻译: 本发明提供下式的化合物其中R是任选取代的低级烷基,环烷基或芳基; R'是烷基或芳基; n为0或1或2的整数; 或其对映体; 或其对映体混合物。 式(I)化合物是桥连的C2对称联苯二膦类似物,因此可用作配体以产生可用于各种不对称反应的手性过渡金属催化剂。 根据本文公开的方法,本发明的化合物可以以高非对映异构体和光学纯度容易地获得。

    Radioactively coated devices
    12.
    发明授权
    Radioactively coated devices 有权
    放射性涂层设备

    公开(公告)号:US06793798B2

    公开(公告)日:2004-09-21

    申请号:US10084471

    申请日:2002-02-28

    IPC分类号: C25D900

    摘要: This invention relates to radioactively coated devices, preferably radioactively coated medical devices. These coated devices are characterized as having a low rate of leaching of the radioisotope from the surface of the coated device and a uniform radioactive coating, and are therefore suitable for use within biological systems. Methods for coating a device with a radioisotope comprising are also disclosed. One method comprises immersing the device within a solution containing a &Ugr;, &bgr;+, &agr;, &bgr;− or &egr; (electron capture) emitting radioisotope, then exposing the immersed substrate to tuned vibrational cavitation to produce a coated substrate. A second method involves coating a substrate using electroless plating, and yet a third method involves the use of electroplating a radioisotope onto a substrate of interest. With these methods, the coating procedures are followed by baking the coated substrate at a temperature below the recrystallization temperature of the substrate. Substrates coated using the methods of this invention exhibit very low rates of leaching of the coated radioisotope, and are suitable for use within medical applications, for example as stents, catheters, seeds, protheses, vavles, staples and other wound closure devices, where a localized therapeutic treatment is desired.

    摘要翻译: 本发明涉及放射性涂覆的装置,优选放射性涂覆的医疗装置。 这些涂覆装置的特征在于放射性同位素从涂覆装置的表面浸出的速度低,并且具有均匀的放射性涂层,因此适用于生物系统。 还公开了包含放射性同位素的装置的涂覆方法。 一种方法包括将装置浸入含有Upsilon,β+,α,β - 或ε(电子捕获)发射放射性同位素的溶液中,然后将浸没的基材暴露于调谐的振动空化以产生涂覆的基底。 第二种方法包括使用无电电镀来涂覆基底,而第三种方法涉及将放射性同位素电镀到感兴趣的底物上。 利用这些方法,涂覆过程之后,在低于基材的再结晶温度的温度下烘烤涂覆的基材。 使用本发明的方法涂覆的底物显示出非常低的涂覆放射性同位素浸出率,并且适用于医疗应用中,例如作为支架,导管,种子,补片,气泡,缝钉和其它伤口闭合装置,其中 需要局部治疗。

    Combination of global clock and localized clocks
    14.
    发明授权
    Combination of global clock and localized clocks 有权
    全局时钟和本地化时钟的组合

    公开(公告)号:US06191609B1

    公开(公告)日:2001-02-20

    申请号:US09433642

    申请日:1999-11-03

    IPC分类号: H03K19177

    CPC分类号: H03K19/1774 G06F1/10

    摘要: A programmable logic device includes a global clock structure and a plurality of localized clock structures. Each localized clock structure distributes a respective localized clock signal to a corresponding portion of the programmable logic device. The global clock structure distributes a global clock signal to all portion of the programmable logic device.

    摘要翻译: 可编程逻辑器件包括全局时钟结构和多个局部时钟结构。 每个局部时钟结构将相应的局部时钟信号分配给可编程逻辑器件的对应部分。 全局时钟结构将全局时钟信号分配给可编程逻辑器件的所有部分。

    Method of affixing radioisotopes onto the surface of a device
    15.
    发明授权
    Method of affixing radioisotopes onto the surface of a device 失效
    将放射性同位素固定在装置的表面上的方法

    公开(公告)号:US6103295A

    公开(公告)日:2000-08-15

    申请号:US995524

    申请日:1997-12-22

    摘要: A method for coating a substrate with a radioisotope comprising is disclosed. The method comprises immersing the substrate within a solution containing a .gamma., .beta..sup.+, .alpha. or .beta..sup.- emitting radioisotope, then exposing the immersed substrate to tuned vibrational cavitation (i.e. ultrasonic) to produce a coated substrate, followed by baking the coated substrate at a temperature below the recrystallization temperature of the substrate. Following this step, the substrate is rinsed and dried. Substrates coated using the method of this invention exhibit very low rates of leaching of the coated radioisotope, and are suitable for use within medical applications.

    摘要翻译: 公开了一种用放射性同位素涂覆衬底的方法。 该方法包括将衬底浸入含有γ,β+,α或β发射放射性同位素的溶液中,然后将浸没的基底暴露于调谐的振动空化(即超声波)以产生涂覆的基底,然后在 温度低于衬底的再结晶温度。 在该步骤之后,将基底冲洗并干燥。 使用本发明方法涂覆的底物表现出非常低的涂覆放射性同位素浸出率,并且适用于医疗应用。

    Puerarin derivatives and their medical uses
    16.
    发明申请
    Puerarin derivatives and their medical uses 审中-公开
    葛根素衍生物及其医疗用途

    公开(公告)号:US20060084615A1

    公开(公告)日:2006-04-20

    申请号:US10969571

    申请日:2004-10-20

    IPC分类号: A61K31/7048 C07H17/00

    CPC分类号: C07H17/00

    摘要: The present invention provides acetylated derivatives of the compound puerarin that have enhanced bioavailability and are particularly suitable for oral administration. The present invention also teaches the use of medicaments containing acetylated derivatives of puerarin that are suitable for the treatment of myocardial ischemia and for modulating blood lipid levels, dilating coronary and cerebral arteries, reducing oxygen consumption of cardiomyocytes, improving microcirculation and preventing aggregation of blood platelets.

    摘要翻译: 本发明提供具有增强的生物利用度并且特别适合于口服给药的化合物葛根素的乙酰化衍生物。 本发明还教导了含有适用于治疗心肌缺血和调节血脂水平,扩张冠状动脉和脑动脉,减少心肌细胞耗氧量,改善微循环并防止血小板聚集的葛根素乙酰化衍生物的药物的用途 。

    Programmable logic device
    17.
    发明授权
    Programmable logic device 有权
    可编程逻辑器件

    公开(公告)号:US06462576B1

    公开(公告)日:2002-10-08

    申请号:US09661585

    申请日:2000-09-14

    IPC分类号: H03K19177

    CPC分类号: H03K19/17728 H03K17/163

    摘要: An improved programmable logic device includes a set of I/O cells, a set of logic blocks, and a routing pool that provides connections among the logic blocks and the I/O cells. At least one of the logic blocks includes a programmable logic array that generates product term output signals on product term output lines. A first product term summing circuit has input terminals, at least one of which is coupled to a product term output line. The first product term summing circuit generates an output signal at an output terminal in response to at least one product term output signal. Likewise, a second product term summing circuit has input terminals, at least one of which is coupled to a product term output line. The second product term summing circuit generates an output signal at an output terminal in response to at least one product term output signal. The logic block further includes first and second output lines and a first programmable switching device that programmably couples the first output line to the output terminal of either the first or the second product term summing circuit. The logic block further includes a second programmable switching device that programmably couples the second output line to the output terminal of either the first or the second product term summing circuit. The programmable logic device has increased functional capacity. In addition, generating an interconnect solution to program the programmable logic device is made simpler by the present invention.

    摘要翻译: 改进的可编程逻辑器件包括一组I / O单元,一组逻辑块,以及提供逻辑块和I / O单元之间的连接的路由池。 至少一个逻辑块包括在产品项输出线上产生产品项输出信号的可编程逻辑阵列。 第一乘积项求和电路具有输入端子,其中至少一个耦合到产品项输出线。 第一乘积项求和电路响应于至少一个乘积项输出信号在输出端产生输出信号。 类似地,第二乘积项求和电路具有输入端子,其中至少一个耦合到产品项输出线。 第二乘积项求和电路响应于至少一个乘积项输出信号在输出端产生输出信号。 逻辑块还包括第一和第二输出线以及可编程地将第一输出线耦合到第一或第二乘积项求和电路的输出端的第一可编程开关装置。 逻辑块还包括可编程地将第二输出线耦合到第一或第二乘积项求和电路的输出端的第二可编程开关装置。 可编程逻辑器件具有增加的功能容量。 此外,通过本发明使得生成用于编程可编程逻辑器件的互连解决方案变得更简单。

    Method and structure for dynamic in-system programming
    18.
    发明授权
    Method and structure for dynamic in-system programming 失效
    动态系统编程的方法和结构

    公开(公告)号:US06304099B1

    公开(公告)日:2001-10-16

    申请号:US09083335

    申请日:1998-05-21

    IPC分类号: G06F738

    摘要: An input/output circuit in an In-system programmable (ISP) logic device allows an output signal from a boundary scan register to be provided as output during programming operations of said ISP logic device. Thus, the ISP logic circuit can provide valid data output to other circuits interfaced to the ISP logic circuit during programming of the ISP logic device, thereby obviating a need to reset the system after reprogramming of the ISP logic device.

    摘要翻译: 在系统可编程(ISP)逻辑器件中的输入/输出电路允许在所述ISP逻辑器件的编程操作期间将来自边界扫描寄存器的输出信号提供为输出。 因此,ISP逻辑电路可以在ISP逻辑器件的编程期间向与ISP逻辑电路接口的其它电路提供有效的数据输出,从而避免在对ISP逻辑器件进行重新编程之后复位系统的需要。

    Method for minimizing instantaneous currents when driving bus signals
    19.
    发明授权
    Method for minimizing instantaneous currents when driving bus signals 失效
    驱动总线信号时最小化瞬时电流的方法

    公开(公告)号:US06278311B1

    公开(公告)日:2001-08-21

    申请号:US09440207

    申请日:1999-11-15

    IPC分类号: H03H1126

    CPC分类号: H03K19/17728 H03K17/163

    摘要: A method for minimizing instantaneous currents ina signal bus is disclosed. The method involves providing a programmable delay element in each of the signal buffers driving the signal on the bus. The programmable delay element in each signal buffer is selectable enabled to include a predetermined time delay. The method involves programming the delay elements in a selected group of the signal buffers t includde the predetermined time delay, so that the selected group of signal buffers each generate an output signal switching after the predetermined delay relative to the switching of output signals generated by other signal buffers.

    摘要翻译: 公开了一种使信号总线中的瞬时电流最小化的方法。 该方法涉及在驱动总线上的信号的每个信号缓冲器中提供可编程延迟元件。 每个信号缓冲器中的可编程延迟元件被选择使能以包括预定的时间延迟。 该方法包括对所选择的信号缓冲器组t中的延迟元件进行编程,包括预定的时间延迟,使得所选择的信号缓冲器组在相对于由其他产生的输出信号的切换的预定延迟之后产生切换输出信号 信号缓冲器。

    Combination of global clock and localized clocks
    20.
    发明授权
    Combination of global clock and localized clocks 失效
    全局时钟和本地化时钟的组合

    公开(公告)号:US6133750A

    公开(公告)日:2000-10-17

    申请号:US069035

    申请日:1998-04-27

    IPC分类号: G06F1/10 H03K19/177

    CPC分类号: H03K19/1774 G06F1/10

    摘要: A programmable logic device includes a global clock structure and a plurality of localized clock structures. Each localized clock structure distributes a respective localized clock signal to a corresponding portion of the programmable logic device. The global clock structure distributes a global clock signal to all portions of the programmable logic device.

    摘要翻译: 可编程逻辑器件包括全局时钟结构和多个局部时钟结构。 每个局部时钟结构将相应的局部时钟信号分配给可编程逻辑器件的对应部分。 全局时钟结构将全局时钟信号分配给可编程逻辑器件的所有部分。