公开(公告)号：US08461664B2

公开(公告)日：2013-06-11

申请号：US13115453

申请日：2011-05-25

申请人： Brian R. Bennett ,  John Bradley Boos ,  Mario Ancona ,  James G. Champlain ,  Nicolas A Papanicolaou

发明人： Brian R. Bennett ,  John Bradley Boos ,  Mario Ancona ,  James G. Champlain ,  Nicolas A Papanicolaou

IPC分类号： H01L29/20

CPC分类号： H01L21/02398 ,  H01L21/02395 ,  H01L21/02466 ,  H01L21/02505 ,  H01L21/02549 ,  H01L27/0605

摘要： A complementary metal oxide semiconductor (CMOS) device in which a single InxGa1-xSb quantum well serves as both an n-channel and a p-channel in the same device and a method for making the same. The InxGa1-xSb layer is part of a heterostructure that includes a Te-delta doped AlyGa1-ySb layer above the InxGa1-xSb layer on a portion of the structure. The portion of the structure without the Te-delta doped AlyGa1-ySb barrier layer can be fabricated into a p-FET by the use of appropriate source, gate, and drain terminals, and the portion of the structure retaining the Te-delta doped AlyGa1-ySb layer can be fabricated into an n-FET so that the structure forms a CMOS device, wherein the single InxGa1-xSb quantum well serves as the transport channel for both the n-FET portion and the p-FET portion of the heterostructure.

摘要翻译： 在同一器件中单个In x Ga 1-x Sb量子阱用作n沟道和p沟道的互补金属氧化物半导体（CMOS）器件及其制造方法。 In x Ga 1-x Sb层是异质结构的一部分，其在结构的一部分上包括在In x Ga 1-x Sb层上方的Te-δ掺杂的Al y Ga 1-y Sb。 可以通过使用适当的源极，栅极和漏极端子将不具有Te-δ掺杂的AlI y Ga 1-y Sb阻挡层的部分结构制成p-FET，并且保留Te-δ掺杂的Al y Ga 1 -ySb层可以制造成n-FET，使得该结构形成CMOS器件，其中单个In x Ga 1-x Sb量子阱用作异质结构的n-FET部分和p-FET部分的传输沟道。

公开(公告)号：US20090302352A1

公开(公告)日：2009-12-10

申请号：US12476298

申请日：2009-06-02

申请人： Richard Magno ,  Mario Ancona ,  John Bradley Boos ,  James G. Champlain ,  Harvey S. Newman

发明人： Richard Magno ,  Mario Ancona ,  John Bradley Boos ,  James G. Champlain ,  Harvey S. Newman

IPC分类号： H01L29/207 ,  H01L21/203

CPC分类号： H01L29/205 ,  H01L21/02398 ,  H01L21/02466 ,  H01L21/02505 ,  H01L21/02546 ,  H01L21/02549 ,  H01L21/02576 ,  H01L21/02631 ,  H01L29/201 ,  H01L29/207 ,  H01L29/861

摘要： This disclosure describes a semiconductor device that can be used as a mixer at RF frequencies extending from a few tens of GHz into the THz frequency range. The device is composed of narrow bandgap semiconductors grown by solid source molecular beam epitaxy. The device can comprise a GaSb substrate, a AlSb layer on the GaSb substrate, a In0.69Al0.31As0.41Sb0.59 layer, on the AlSb layer and wherein the In0.69Al0.31As0.41Sb0.59 comprises varying levels of Te doping, a In0.27Ga0.73Sb layer on the In0.69Al0.31As0.41 Sb0.59 layer, wherein the In0.27Ga0.73Sb layer is Be doped, wherein the first section of the In0.69Al0.31As0.41Sb0.59 layer has is Te doped, wherein the second section of the In0.69Al0.31As0.41Sb0.59 layer has a grade in Te concentration, and wherein the third section of the In0.69Al0.31As0.41Sb0.59 layer is Te doped.

摘要翻译： 本公开描述了一种半导体器件，其可以用作从几十GHz到THz频率范围的RF频率的混频器。 该器件由固体源分子束外延生长的窄带隙半导体组成。 该器件可以包括GaSb衬底，GaSb衬底上的AlSb层，AlSb层上的In0.69Al0.31As0.41Sb0.59层，其中In0.69Al0.31As0.41Sb0.59包含不同水平的Te掺杂 ，In0.69Al0.31As0.41 Sb0.59层的In0.27Ga0.73Sb层，其中In0.27Ga0.73Sb层被掺杂，其中In0.69Al0.31As0.41Sb0.59层的第一段 已掺杂Te，其中In0.69Al0.31As0.41Sb0.59层的第二段具有Te浓度的等级，其中In0.69Al0.31As0.41Sb0.59层的第三段为Te掺杂。

公开(公告)号：US08076700B2

公开(公告)日：2011-12-13

申请号：US12476298

申请日：2009-06-02

申请人： Richard Magno ,  Mario Ancona ,  John Bradley Boos ,  James G Champlain ,  Harvey S Newman

发明人： Richard Magno ,  Mario Ancona ,  John Bradley Boos ,  James G Champlain ,  Harvey S Newman

IPC分类号： H01L29/207 ,  H01L21/203

CPC分类号： H01L29/205 ,  H01L21/02398 ,  H01L21/02466 ,  H01L21/02505 ,  H01L21/02546 ,  H01L21/02549 ,  H01L21/02576 ,  H01L21/02631 ,  H01L29/201 ,  H01L29/207 ,  H01L29/861

摘要： This disclosure describes a semiconductor device that can be used as a mixer at RF frequencies extending from a few tens of GHz into the THz frequency range. The device is composed of narrow bandgap semiconductors grown by solid source molecular beam epitaxy. The device can comprise a GaSb substrate, a AlSb layer on the GaSb substrate, a In0.69Al0.31As0.41Sb0.59 layer, on the AlSb layer and wherein the In0.69Al0.31As0.41Sb0.59 comprises varying levels of Te doping, a In0.27Ga0.73Sb layer on the In0.69Al0.31As0.41 Sb0.59 layer, wherein the In0.27Ga0.73Sb layer is Be doped, wherein the first section of the In0.69Al0.31As0.41Sb0.59 layer has is Te doped, wherein the second section of the In0.69Al0.31As0.41Sb0.59 layer has a grade in Te concentration, and wherein the third section of the In0.69Al0.31As0.41Sb0.59 layer is Te doped.

摘要翻译： 本公开描述了一种半导体器件，其可以用作从几十GHz到THz频率范围的RF频率的混频器。 该器件由固体源分子束外延生长的窄带隙半导体组成。 该器件可以包括GaSb衬底，GaSb衬底上的AlSb层，AlSb层上的In0.69Al0.31As0.41Sb0.59层，其中In0.69Al0.31As0.41Sb0.59包含不同水平的Te掺杂 ，In0.69Al0.31As0.41 Sb0.59层的In0.27Ga0.73Sb层，其中In0.27Ga0.73Sb层被掺杂，其中In0.69Al0.31As0.41Sb0.59层的第一段 已掺杂Te，其中In0.69Al0.31As0.41Sb0.59层的第二段具有Te浓度的等级，其中In0.69Al0.31As0.41Sb0.59层的第三段为Te掺杂。

公开(公告)号：US07388235B2

公开(公告)日：2008-06-17

申请号：US11239431

申请日：2005-09-20

申请人： John Bradley Boos ,  Brian R Bennett ,  Richard Magno ,  Nicholas A Papanicolou ,  Brad P. Tinkham

发明人： John Bradley Boos ,  Brian R Bennett ,  Richard Magno ,  Nicholas A Papanicolou ,  Brad P. Tinkham

IPC分类号： H01L29/739 ,  H01L31/00

CPC分类号： H01L29/7783

摘要： This invention pertains to an electronic device containing a semi-insulating substrate, a buffer layer of an antimony-based material disposed on said substrate, a channel layer of InAsySb1-y material disposed on said buffer layer, a barrier layer of an antimony-based disposed on said channel layer, and a cap layer of InAsySb1-y material disposed on said barrier layer, wherein the device can have frequency of on the order of 500 GHz and a reduced power dissipation.

摘要翻译： 本发明涉及一种电子器件，其包含半绝缘衬底，设置在所述衬底上的锑基材料的缓冲层，InAs Sb 3 Sb 1-y的沟道层， 设置在所述缓冲层上的SUB>材料，设置在所述沟道层上的锑基阻挡层，以及设置在所述缓冲层上的InAsSb 1-y材料的覆盖层 在所述阻挡层上，其中所述器件可以具有大约500GHz的频率和降低的功率耗散。

公开(公告)号：US06316124B1

公开(公告)日：2001-11-13

申请号：US09482053

申请日：2000-01-13

申请人： John Bradley Boos ,  Walter Kruppa ,  Brian R. Bennett ,  Ming-Jey Yang

发明人： John Bradley Boos ,  Walter Kruppa ,  Brian R. Bennett ,  Ming-Jey Yang

IPC分类号： B32B1500

CPC分类号： B32B15/01 ,  Y10T428/12528 ,  Y10T428/12681 ,  Y10T428/12736 ,  Y10T428/2495

摘要： This invention pertains to more sensitive and more stable electronic devices which can sense electrical and magnetic fields. The devices are characterized by InAs channels confined on both sides thereof by a wide band gap AlSb material; protective layers above the AlSb material; modulation doping above the AlSb material; and layers of the InAs channel material containing 1 to 99 mol percent antimony, with the channel material being deposited in the form of alternating monolayers of InSb and InAs, of a ternary mixture of InAsSb.

摘要翻译： 本发明涉及可感测电场和磁场的更敏感和更稳定的电子装置。 这些器件的特征在于通过宽带隙AlSb材料限制在其两侧的InAs通道; AlSb材料上方的保护层; AlSb材料上的调制掺杂; 和含有1至99mol％锑的InAs通道材料的层，其中通道材料以InAsb的三元混合物的InSb和InAs的交替单层形式沉积。

公开(公告)号：US5798540A

公开(公告)日：1998-08-25

申请号：US848203

申请日：1997-04-29

申请人： John Bradley Boos ,  Walter Kruppa ,  Doewon Park ,  Brian R. Bennett

发明人： John Bradley Boos ,  Walter Kruppa ,  Doewon Park ,  Brian R. Bennett

IPC分类号： H01L21/308 ,  H01L21/338 ,  H01L29/201 ,  H01L29/205 ,  H01L29/778 ,  H01L29/812 ,  H01L29/00

CPC分类号： H01L29/205 ,  H01L29/201 ,  H01L29/7783

摘要： An electronic device characterized by a GaAs substrate and a base disposed n the substrate, the base comprising InAs channel layer, AlSb layer above the channel layer, In.sub.x Al.sub.1-x As.sub.y Sb.sub.1-y layer containing at least In, Al, and As disposed above the AlSb channel layer, InAs cap layer disposed above and in contact with the In.sub.x Al.sub.1-x As.sub.y Sb.sub.1-y layer disposed below the InAs channel layer and in contact with the substrate, p.sup.+ GaSb layer disposed within the AlSb layer, Schottky gate with a pad disposed on and in contact with the In.sub.x Al.sub.1-x As.sub.y Sb.sub.1-y layer, at least one ohmic contact disposed on the InAs cap layer, and a trench extending through the base to the substrate isolating the gate bonding pad from the device and providing a gate air bridge which prevents contact between the gate and the InAs layer. The gate air bridge fabrication is accomplished by a liquid etchant containing more than half, on volume basis, of concentrated lactic acid or acetic acid with remainder hydrogen peroxide and concentrated hydrofluoric acid. The etchant attacks InAs, In.sub.x Al.sub.1-x As.sub.y Sb.sub.1-y, AlSb, and GaSb but does not attack GaAs and Au-based alloys.

摘要翻译： 一种电子器件，其特征在于具有GaAs衬底和设置在衬底上的基极，所述基底包括InAs沟道层，在沟道层上方的AlSb层，InxAl1-xAsySb1-y层至少包含位于AlSb沟道上方的In，Al和As 层InAs覆盖层设置在InAs1沟道层下方并与衬底接触的In x Al 1-x As y Sb 1-y层上方并与之接触，设置在AlSb层内的p + GaSb层，具有布置在并且接触的焊盘的肖特基栅极 与InxAl1-xAsySb1-y层，设置在InAs覆盖层上的至少一个欧姆接触，以及延伸穿过基底到衬底的沟槽，将栅极焊盘与器件隔离，并提供栅极空气桥， 门和InAs层。 门空气桥的制造是通过液体蚀刻剂来实现的，该液体蚀刻剂含有一半以上的体积基础上的浓缩乳酸或乙酸，剩余的是过氧化氢和浓缩的氢氟酸。 蚀刻剂攻击InAs，InxAl1-xAsySb1-y，AlSb和GaSb，但不会侵蚀GaAs和Au基合金。

公开(公告)号：US07635879B2

公开(公告)日：2009-12-22

申请号：US11239438

申请日：2005-09-20

申请人： John Bradley Boos ,  Brian R. Bennett ,  Paul Campbell ,  Richard Magno

发明人： John Bradley Boos ,  Brian R. Bennett ,  Paul Campbell ,  Richard Magno

IPC分类号： H01L29/40

CPC分类号： H01L29/201 ,  H01L29/205 ,  H01L29/7371

摘要： This invention pertains to heterojunction bipolar transistors containing a semiconductor substrate, a buffer layer of an antimony-based material deposited on the substrate, a sub-collector layer of an antimony-based material deposited on the buffer layer, a collector layer of an antimony-based material deposited on the sub-collector layer, a base layer of an antimony-based material deposited on the collector layer, an emitter layer of an antimony-based material deposited on the base layer, and a cap layer of an antimony-based material deposited on the emitter layer.

摘要翻译： 本发明涉及含有半导体衬底的异质结双极晶体管，沉积在衬底上的锑基材料的缓冲层，沉积在缓冲层上的锑基材料的副集电极层，锑 - 沉积在集电极层上的锑基材料的基底层，沉积在基底层上的锑基材料的发射极层和锑基材料的覆盖层， 沉积在发射极层上。

公开(公告)号：US20080258176A1

公开(公告)日：2008-10-23

申请号：US11788145

申请日：2007-04-18

申请人： Yeong-Chang Chou ,  Jay Crawford ,  Jane Lee ,  Jeffrey Ming-Jer Yang ,  John Bradley Boos ,  Nicolas Alexandrou Papanicolaou

发明人： Yeong-Chang Chou ,  Jay Crawford ,  Jane Lee ,  Jeffrey Ming-Jer Yang ,  John Bradley Boos ,  Nicolas Alexandrou Papanicolaou

IPC分类号： H01L23/48 ,  H01L21/3205 ,  H01L21/335 ,  H01L31/00

CPC分类号： H01L29/66431 ,  H01L29/7783

摘要： An apparatus in one example comprises an antimonide-based compound semiconductor (ABCS) stack, an upper barrier layer formed on the ABCS stack, and a gate stack formed on the upper barrier layer. The upper barrier layer comprises indium, aluminum, and arsenic. The gate stack comprises a base layer of titanium and tungsten formed on the upper barrier layer.

摘要翻译： 一个实例中的装置包括基于锑化物的化合物半导体（ABCS）堆叠，形成在ABCS堆叠上的上阻挡层和形成在上阻挡层上的栅极堆叠。 上阻挡层包括铟，铝和砷。 栅堆叠包括形成在上阻挡层上的钛和钨的基层。

公开(公告)号：US20130210219A1

公开(公告)日：2013-08-15

申请号：US13793251

申请日：2013-03-11

申请人： Yeong-Chang CHOU ,  Jay CRAWFORD ,  Jane LEE ,  Jeffrey Ming-Jer YANG ,  John Bradley Boos ,  Nicolas Alexandrou Papanicolaou

发明人： Yeong-Chang CHOU ,  Jay CRAWFORD ,  Jane LEE ,  Jeffrey Ming-Jer YANG ,  John Bradley Boos ,  Nicolas Alexandrou Papanicolaou

IPC分类号： H01L29/66

CPC分类号： H01L29/66431 ,  H01L29/7783

摘要： An apparatus in one example comprises an antimonide-based compound semiconductor (ABCS) stack, an upper barrier layer formed on the ABCS stack, and a gate stack formed on the upper barrier layer. The upper barrier layer comprises indium, aluminum, and arsenic. The gate stack comprises a base layer of titanium and tungsten formed on the upper barrier layer.

摘要翻译： 一个实例中的装置包括基于锑化物的化合物半导体（ABCS）堆叠，形成在ABCS堆叠上的上阻挡层和形成在上阻挡层上的栅极堆叠。 上阻挡层包括铟，铝和砷。 栅堆叠包括形成在上阻挡层上的钛和钨的基层。

公开(公告)号：US08421121B2

公开(公告)日：2013-04-16

申请号：US11788145

申请日：2007-04-18

申请人： Yeong-Chang Chou ,  Jay Crawford ,  Jane Lee ,  Jeffrey Ming-Jer Yang ,  John Bradley Boos ,  Nicolas Alexandrou Papanicolaou

发明人： Yeong-Chang Chou ,  Jay Crawford ,  Jane Lee ,  Jeffrey Ming-Jer Yang ,  John Bradley Boos ,  Nicolas Alexandrou Papanicolaou

IPC分类号： H01L29/778

CPC分类号： H01L29/66431 ,  H01L29/7783

摘要： An apparatus in one example comprises an antimonide-based compound semiconductor (ABCS) stack, an upper barrier layer formed on the ABCS stack, and a gate stack formed on the upper barrier layer. The upper barrier layer comprises indium, aluminum, and arsenic. The gate stack comprises a base layer of titanium and tungsten formed on the upper barrier layer.