摘要:
A method for increasing the robustness of a double patterning router used in the manufacture of integrated circuit devices that includes providing a set of original color rules defining an original color rule space, providing a set of integrated circuit designs defining a design space, providing a router processing engine, perturbing the original color rules to define a perturbed color rule space, applying the perturbed color rule space and the design space to the router processing engine to expose double pattern routing odd cycle decomposition errors, and feeding back the exposed decomposition errors to enhance router processing engine development by reconfiguring the router processing engine in accordance with the exposed decomposition errors.
摘要:
A semiconductor device is provided for implementing at least one logic element. The semiconductor device includes a semiconductor substrate with a first transistor and a second transistor formed on the semiconductor substrate. Each of the transistors includes a source, a drain, and a gate. A CA layer is electrically connected to at least one of the source or the drain of the first transistor. A CB layer is electrically connected to at least one of the gates of the transistors and the CA layer.
摘要:
A method and device for determining projection lens pupil transmission distribution in a photolithographic imaging system, the device including an illumination source; a transmissive reticle; an aperture layer having an illumination source side and a light emission side and comprising a plurality of openings therethrough; a diffuser mounted on the illumination source side of the aperture layer; a projection lens system; and an image plane, in which a pupil image corresponding to each of the plurality of openings in the aperture layer is formed at the image plane when radiation from the illumination source passes through the reticle, the diffuser, the aperture layer and the projection lens system, the pupil image having a projection lens pupil transmission distribution.
摘要:
According to one exemplary embodiment, a method for determining a Weibull slope at a specified temperature utilizing a test structure comprises a step of performing a number of groups of failure tests on the test structure to determine a number of groups of test data, where each of the groups of failure tests is performed at a respective one of a number of test temperatures, and where each group of failure tests corresponds to a respective group of test data. The method further comprises utilizing the number of groups of test data to determine a scaling line. The method further comprises determining a scaling factor at the specified temperature utilizing the scaling line. The method further comprises utilizing the scaling factor to determine the Weibull slope. The method may further comprise utilizing the Weibull slope to determine a lifetime of the semiconductor die.
摘要:
An optical monitor includes a body having a first plurality of parallel, substantially opaque, spaced apart lines thereon, and the second plurality of parallel, substantially opaque, spaced apart lines thereon, with a relatively small angle between the first and second pluralities of lines. A an image of the lines of the first plurality thereof is provided on the semiconductor body, upon relative movement of the monitor toward and away from the semiconductor body, the line images move relative to the semiconductor body. The images of the lines of the second plurality thereof provided on the semiconductor body move in a different manner upon relative movement if the monitor toward and away from the semiconductor body: The moiré fringe formed on the semiconductor body from images of the first and second plurality of lines during such movement is analyzed in order to achieve proper focus of the image on the semiconductor body.
摘要:
One illustrative method disclosed herein involves creating an overall target pattern that includes an odd-jogged feature with a crossover region that connects first and second line portions, wherein the crossover region has a first dimension in a first direction that is greater than a second dimension that is transverse to the first direction, decomposing the overall target pattern into a first sub-target pattern and a second sub-target pattern, wherein each of the sub-target patterns comprise a line portion and a first portion of the crossover region, and generating first and second sets of mask data corresponding to the first and second sub-target patterns, respectively.
摘要:
Methods are provided for fabricating a semiconductor device. One method comprises providing a first pattern having a first polygon, the first polygon having a first tonality and having a first side and a second side, the first side adjacent to a second polygon having a second tonality, and the second side adjacent to a third polygon having the second tonality, and forming a second pattern by reversing the tonality of the first pattern. The method further comprises forming a third pattern from the second pattern by converting the second polygon from the first tonality to the second tonality forming a fourth pattern from the second pattern by converting the third polygon from the first tonality to the second tonality forming a fifth pattern by reversing the tonality of the third pattern, and forming a sixth pattern by reversing the tonality of the fourth pattern.
摘要:
Photolithography methods using BARCs having graded optical properties are provided. In an exemplary embodiment, a photolithography method comprises the steps of depositing a BARC overlying a material to be patterned, the BARC having a refractive index and an absorbance. The BARC is modified such that, after the step of modifying, values of the refractive index and the absorbance are graded from first values at a first surface of the BARC to second values at a second surface of the BARC. The step of modifying is performed after the step of depositing.
摘要:
Accurate ultrafine patterns are formed using a multiple exposure technique comprising implementing an OPC procedure to form an exposure reticle to compensate for distortion of an overlying resist pattern caused by an underlying resist pattern. Embodiments include forming a first resist pattern in a first resist layer over a target layer using a first exposure reticle, forming a second exposure reticle by an OPC technique to compensate for distortion of a second resist pattern caused by the underlying first resist pattern, depositing a second resist layer on the first resist pattern, forming the second resist pattern in the second resist layer using the second exposure reticle, the first and second resist patterns constituting a final resist mask, and forming a pattern in the target layer using the final resist mask.
摘要:
A method for forming a semiconductor device is provided including processing a wafer having a target material; forming a first pattern over the target material; forming a protection layer over the first pattern; and forming a second pattern, over the target material and not over the protection layer, without an etching step between the forming the first pattern and the forming the second pattern.