Switching method to reduce ripple current in a switched-mode power converter employing a bridge topology
    11.
    发明授权
    Switching method to reduce ripple current in a switched-mode power converter employing a bridge topology 有权
    采用桥接拓扑的开关式功率转换器的开关方法,以减少纹波电流

    公开(公告)号:US08749215B2

    公开(公告)日:2014-06-10

    申请号:US12872831

    申请日:2010-08-31

    申请人: Richard K. Hester

    发明人: Richard K. Hester

    IPC分类号: G05F1/00 H02M3/158 H02M1/14

    CPC分类号: H02M1/14 H02M3/1582

    摘要: Traditionally, buck-boost switching regulators with bridge topologies have been avoided due to their inability to seamlessly transition between buck mode and boost mode. Here, however, a buck-boost switching regulator with a bridge topology has been provided, which has an improved controller. Namely, a processor (such as a digital signals processor or DSP) provides digital control for the bridge that reduces ripple current or variations in the inductor current by adjusting phase relationships between corresponding buck and boost switches in a bridge or buck-boost mode.

    摘要翻译: 传统上,由于它们无法在降压模式和升压模式之间无缝转换,因此避免了具有桥接拓扑的降压 - 升压开关稳压器。 然而,这里提供了具有桥接拓扑的降压 - 升压开关稳压器,其具有改进的控制器。 也就是说,处理器(例如数字信号处理器或DSP)为桥提供数字控制,通过调节桥或降压 - 升压模式中对应的降压和升压开关之间的相位关系,可减少纹波电流或电感电流变化。

    Class DH amplifier
    12.
    发明授权
    Class DH amplifier 有权
    DH类放大器

    公开(公告)号:US08269475B2

    公开(公告)日:2012-09-18

    申请号:US12372139

    申请日:2009-02-17

    IPC分类号: G05F1/00

    CPC分类号: H03F3/217

    摘要: A class DH amplifier is provided. The amplifier is generally comprised of a tracking power supply, a class D amplifier section, and a carrier generator. The tracking power supply receives a supply voltage and an analog input signal, and the tracking power supply provides an input for the carrier generator. Based on its input from the tracking power supply, the carrier generator can output a positive ramp signal and a negative ramp signal to the class D amplifier section. The class D amplifier section can generate an output signal base on the analog input signal and the ramp signals from the carrier generator.

    摘要翻译: 提供DH类放大器。 放大器通常由跟踪电源,D类放大器部分和载波发生器组成。 跟踪电源接收电源电压和模拟输入信号,跟踪电源为载波发生器提供输入。 基于跟踪电源的输入,载波发生器可以向D类放大器部分输出正斜坡信号和负斜坡信号。 D类放大器部分可以基于模拟输入信号和来自载波发生器的斜坡信号产生输出信号。

    CLASS DH AMPLIFIER
    13.
    发明申请
    CLASS DH AMPLIFIER 有权
    CLASS DH放大器

    公开(公告)号:US20100207592A1

    公开(公告)日:2010-08-19

    申请号:US12372139

    申请日:2009-02-17

    IPC分类号: G05F1/10

    CPC分类号: H03F3/217

    摘要: A class DH amplifier is provided. The amplifier is generally comprised of a tracking power supply, a class D amplifier section, and a carrier generator. The tracking power supply receives a supply voltage and an analog input signal, and the tracking power supply provides an input for the carrier generator. Based on its input from the tracking power supply, the carrier generator can output a positive ramp signal and a negative ramp signal to the class D amplifier section. The class D amplifier section can generate an output signal base on the analog input signal and the ramp signals from the carrier generator.

    摘要翻译: 提供DH类放大器。 放大器通常由跟踪电源,D类放大器部分和载波发生器组成。 跟踪电源接收电源电压和模拟输入信号,跟踪电源为载波发生器提供输入。 基于跟踪电源的输入,载波发生器可以向D类放大器部分输出正斜坡信号和负斜坡信号。 D类放大器部分可以基于模拟输入信号和来自载波发生器的斜坡信号产生输出信号。

    ADSL front-end in a low voltage process that accommodates large line voltages
    14.
    发明授权
    ADSL front-end in a low voltage process that accommodates large line voltages 有权
    ADSL前端处于低压工艺,可以容纳大的线路电压

    公开(公告)号:US06904145B2

    公开(公告)日:2005-06-07

    申请号:US09957955

    申请日:2001-09-21

    CPC分类号: H04M1/7385

    摘要: The asymmetric digital subscriber line receive channel includes: first and second external resistors 20 and 22 coupled to a telephone line 24 and 26; a coarse programmable gain amplifier CPGA formed in a low voltage process having inputs coupled to the first and second external resistors 20 and 22; and a fine programmable gain amplifier PGA1 coupled to an output of the coarse programmable gain amplifier CPGA, and having a very fine gain trim adjustment to compensate for a mismatch between the external resistors 20 and 22 and the coarse programmable gain amplifier CPGA.

    摘要翻译: 非对称数字用户线路接收信道包括:耦合到电话线路24和26的第一和第二外部电阻器20和22; 在低电压工艺中形成的粗略可编程增益放大器CPGA,其具有耦合到第一和第二外部电阻器20和22的输入; 以及耦合到粗略可编程增益放大器CPGA的输出的精细可编程增益放大器PGA1,并且具有非常精细的增益调整以补偿外部电阻20和22与粗略可编程增益放大器CPGA之间的失配。

    Charge redistribution A/D converter with reduced small signal error
    15.
    发明授权
    Charge redistribution A/D converter with reduced small signal error 失效
    电荷再分配A / D转换器具有减小的小信号误差

    公开(公告)号:US4831381A

    公开(公告)日:1989-05-16

    申请号:US084277

    申请日:1987-08-11

    申请人: Richard K. Hester

    发明人: Richard K. Hester

    CPC分类号: H03M1/468 H03M1/804

    摘要: An A/D converter utilizing a charge redistribution scheme includes a single ended comparator and associated therewith a capacitor array of binary weighted capacitors. The input signal is sampled with the input of the comparator disposed at a point midway between ground and a unipolar reference voltage. The bottom plates of the capacitors in the hold mode are then disposed at the midpoint of the reference signal. In the redistribution mode, the value of the bits is determined by switching the bottom plates of the capacitors between the midpoint of the reference voltage and either ground or the full value of the reference voltage. The input signal during sampling is attenuated by sampling it onto only one-half of the array.

    摘要翻译: 利用电荷再分配方案的A / D转换器包括单端比较器并与其相关联的二进制加权电容器的电容器阵列。 输入信号被采样,比较器的输入设置在地之间的中点和单极参考电压之间。 然后将保持模式中的电容器的底板设置在参考信号的中点。 在再分配模式下,通过在参考电压的中点与基准电压或参考电压的全部值之间切换电容器的底板来确定位的值。 采样期间的输入信号通过将其采样到阵列的一半来衰减。

    SWITCHING METHOD TO IMPROVE THE EFFICIENCY OF SWITCHED-MODE POWER CONVERTERS EMPLOYING A BRIDGE TOPOLOGY
    16.
    发明申请
    SWITCHING METHOD TO IMPROVE THE EFFICIENCY OF SWITCHED-MODE POWER CONVERTERS EMPLOYING A BRIDGE TOPOLOGY 有权
    切换方式提高使用桥梁拓扑的开关电源转换器的效率

    公开(公告)号:US20120049818A1

    公开(公告)日:2012-03-01

    申请号:US12872896

    申请日:2010-08-31

    申请人: Richard K. Hester

    发明人: Richard K. Hester

    IPC分类号: G05F1/10

    CPC分类号: H02M3/1582 Y10T307/50

    摘要: Traditionally, buck-boost switching regulators with bridge topologies have been avoided due to their inability to seamlessly transition between buck mode and boost mode. Here, however, a buck-boost switching regulator with a bridge topology has been provided, which has an improved controller. Namely, a processor (such as a digital signals processor or DSP) provides digital control for the bridge to enable it so substantially seamlessly transition between buck mode and boost mode.

    摘要翻译: 传统上,由于它们无法在降压模式和升压模式之间无缝转换,因此避免了具有桥接拓扑的降压 - 升压开关稳压器。 然而,这里提供了具有桥接拓扑的降压 - 升压开关稳压器,其具有改进的控制器。 也就是说,处理器(例如数字信号处理器或DSP)为桥提供数字控制,使得它能够在降压模式和升压模式之间基本上无缝地转换。

    SWITCHING METHOD TO REDUCE RIPPLE CURRENT IN A SWITCHED-MODE POWER CONVERTER EMPLOYING A BRIDGE TOPOLOGY
    17.
    发明申请
    SWITCHING METHOD TO REDUCE RIPPLE CURRENT IN A SWITCHED-MODE POWER CONVERTER EMPLOYING A BRIDGE TOPOLOGY 有权
    切换方式降低开关模式电源转换器中纹波电流的桥接方法

    公开(公告)号:US20120049816A1

    公开(公告)日:2012-03-01

    申请号:US12872831

    申请日:2010-08-31

    申请人: Richard K. Hester

    发明人: Richard K. Hester

    IPC分类号: G05F1/10

    CPC分类号: H02M1/14 H02M3/1582

    摘要: Traditionally, buck-boost switching regulators with bridge topologies have been avoided due to their inability to seamlessly transition between buck mode and boost mode. Here, however, a buck-boost switching regulator with a bridge topology has been provided, which has an improved controller. Namely, a processor (such as a digital signals processor or DSP) provides digital control for the bridge that reduces ripple current or variations in the inductor current by adjusting phase relationships between corresponding buck and boost switches in a bridge or buck-boost mode.

    摘要翻译: 传统上,由于它们无法在降压模式和升压模式之间无缝转换,因此避免了具有桥接拓扑的降压 - 升压开关稳压器。 然而,这里提供了具有桥接拓扑的降压 - 升压开关稳压器,其具有改进的控制器。 也就是说,处理器(例如数字信号处理器或DSP)为桥提供数字控制,通过调节桥或降压 - 升压模式中对应的降压和升压开关之间的相位关系,可减少纹波电流或电感电流变化。

    Active hybrid circuit
    18.
    发明授权

    公开(公告)号:US06803811B2

    公开(公告)日:2004-10-12

    申请号:US10280398

    申请日:2002-10-26

    申请人: Richard K. Hester

    发明人: Richard K. Hester

    IPC分类号: H03B100

    CPC分类号: H03H7/48

    摘要: A hybrid circuit has a transfer function having three zeros and four poles that are realized using only two fully-differential amplifiers in combination with a small plurality of resistors and capacitors, making the hybrid suitable for use with a communication medium comprising capacitively coupled non-ideal transformers and transmission lines while providing remarkably good hybrid rejection without the use of inductors.

    Analog-to-digital converter using weighted capacitor array and
interpolating comparator
    19.
    发明授权
    Analog-to-digital converter using weighted capacitor array and interpolating comparator 失效
    使用加权电容阵列和内插比较器的模数转换器

    公开(公告)号:US5920275A

    公开(公告)日:1999-07-06

    申请号:US925631

    申请日:1997-09-09

    申请人: Richard K. Hester

    发明人: Richard K. Hester

    IPC分类号: H03M1/20 H03M1/46 H03M1/14

    CPC分类号: H03M1/206 H03M1/468

    摘要: A charge redistribution analog-to-digital converter uses an interpolative comparator to determine multiple bits in a single comparator decision cycle. The result is a speed improvement in the conversion period with little or no increase in power dissipation.

    摘要翻译: 电荷再分配模数转换器使用内插比较器来确定单个比较器决策周期中的多个比特。 结果是转换周期的速度提高,功耗很少或没有增加。