公开(公告)号：US06639279B1

公开(公告)日：2003-10-28

申请号：US09484672

申请日：2000-01-18

申请人： Chae Gee Sung

发明人： Chae Gee Sung

IPC分类号： H01L2701

CPC分类号： H01L29/78696 ,  H01L29/4908 ,  H01L29/66757

摘要： The present invention provides a semiconductor device capable of preventing deterioration in carrier mobility of a semiconductor layer, which is a quality of the interface between the semiconductor layer and an insulating layer, and a method of manufacturing the semiconductor device. In the semiconductor device, an interface layer is provided between a semiconductor layer made of active polycrystalline silicon and an insulating layer made of silicon oxide. The nitrogen element in silicon nitride diffuses into the semiconductor layer made of active polycrystalline silicon to compensate for lattice strain of the active polycrystalline silicon film, to satisfy the desired quality of the interface between the semiconductor layer and the insulating layer.

摘要翻译： 本发明提供能够防止作为半导体层和绝缘层之间的界面的质量的半导体层的载流子迁移率的劣化的半导体器件以及半导体器件的制造方法。 在半导体器件中，在由有源多晶硅制成的半导体层和由氧化硅制成的绝缘层之间提供界面层。 氮化硅中的氮元素扩散到由有源多晶硅制成的半导体层中，以补偿活性多晶硅膜的晶格应变，以满足半导体层和绝缘层之间的界面的期望质量。

公开(公告)号：US06451632B1

公开(公告)日：2002-09-17

申请号：US09934666

申请日：2001-08-22

申请人： Chae Gee Sung

发明人： Chae Gee Sung

IPC分类号： H01L2100

CPC分类号： H01L29/66765 ,  H01L29/41733 ,  H01L29/458 ,  H01L29/78618

摘要： The present invention provides a thin-film transistor substrate comprising: a gate electrode 40 and a gate insulating film 41 formed on a substrate 36; a semiconductor active film 42 oppositely provided on the gate electrode via the gate insulating film; a pair of ohmic contact films 43 and 44 separately provided on the semiconductor active film; a low-resistance silicon compound film 45 ranging from the ohmic contact films to the gate insulating film so as to cover the ohmic contact films and the portions of the semiconductor active film superposing with the ohmic contact films; and a source electrode 46 and a drain electrode 48 provided on the low-resistance silicon compound film.

摘要翻译： 本发明提供一种薄膜晶体管基板，包括：形成在基板36上的栅极40和栅极绝缘膜41; 通过栅极绝缘膜在栅电极上相对设置的半导体有源膜42; 分别设置在半导体活性膜上的一对欧姆接触膜43和44; 从欧姆接触膜到栅极绝缘膜的低电阻硅化合物膜45，以覆盖欧姆接触膜和与欧姆接触膜重叠的半导体有源膜的部分; 以及设置在低电阻硅化合物膜上的源电极46和漏电极48。

公开(公告)号：US06303946B1

公开(公告)日：2001-10-16

申请号：US09118481

申请日：1998-07-17

申请人： Chae Gee Sung

发明人： Chae Gee Sung

IPC分类号： H01L29786

CPC分类号： H01L29/66765 ,  H01L29/41733 ,  H01L29/458 ,  H01L29/78618

摘要： The present invention provides a thin-film transistor substrate comprising: a gate electrode 40 and a gate insulating film 41 formed on a substrate 36; a semiconductor active film 42 oppositely provided on the gate electrode via the gate insulating film; a pair of ohmic contact films 43 and 44 separately provided on the semiconductor active film; a low-resistance silicon compound film 45 ranging from the ohmic contact films to the gate insulating film so as to cover the ohmic contact films and the portions of the semiconductor active film superposing with the ohmic contact films; and a source electrode 46 and a drain electrode 48 provided on the low-resistance silicon compound film.

摘要翻译： 本发明提供一种薄膜晶体管基板，包括：形成在基板36上的栅极40和栅极绝缘膜41; 通过栅极绝缘膜在栅电极上相对设置的半导体有源膜42; 分别设置在半导体活性膜上的一对欧姆接触膜43和44; 从欧姆接触膜到栅极绝缘膜的低电阻硅化合物膜45，以覆盖欧姆接触膜和与欧姆接触膜重叠的半导体有源膜的部分; 以及设置在低电阻硅化合物膜上的源电极46和漏电极48。

公开(公告)号：US06649936B1

公开(公告)日：2003-11-18

申请号：US09526150

申请日：2000-03-15

申请人： Chae Gee Sung ,  Jo Gyoo Chul ,  Makoto Sasaki ,  Kazuyuki Arai

发明人： Chae Gee Sung ,  Jo Gyoo Chul ,  Makoto Sasaki ,  Kazuyuki Arai

IPC分类号： H01L310392

CPC分类号： H01L27/124 ,  G02F1/13458 ,  G02F1/136286 ,  G02F2001/136295 ,  H01L27/1214 ,  H01L29/458 ,  H01L29/66757

摘要： A source line is directly connected to a source terminal composed of indium zinc oxide in a thin-film transistor substrate. A gate line is directly connected to a gate terminal composed of indium zinc oxide. Alternatively, drain electrodes of thin-film transistors for switching a plurality of pixel electrodes are directly connected to pixel electrodes composed of indium zinc oxide. These configurations do not require a passivation film which is essential for conventional thin-film transistor substrates, and the resulting thin-film transistor substrate can be made by a reduced number of manufacturing steps.

摘要翻译： 源极线直接连接到由薄膜晶体管衬底中的氧化铟锌构成的源极端子。 栅极线直接连接到由氧化铟锌构成的栅极端子。 或者，用于切换多个像素电极的薄膜晶体管的漏极直接连接到由氧化铟锌构成的像素电极。 这些配置不需要对于传统的薄膜晶体管衬底是必需的钝化膜，并且所得到的薄膜晶体管衬底可以通过减少数量的制造步骤来制造。

公开(公告)号：US06533965B1

公开(公告)日：2003-03-18

申请号：US09718982

申请日：2000-11-22

申请人： Makoto Sasaki ,  Chae Gee Sung ,  Kazuyuki Arai

发明人： Makoto Sasaki ,  Chae Gee Sung ,  Kazuyuki Arai

IPC分类号： H01B108

CPC分类号： C23C14/5806 ,  C03C17/2453 ,  C03C17/253 ,  C03C2217/211 ,  C03C2217/215 ,  C03C2217/216 ,  C03C2217/23 ,  C23C14/086 ,  C23C14/3414 ,  C23C30/00 ,  G02F1/13439 ,  H01B1/08

摘要： A transparent electrically conductive oxide film is composed of a compound oxide containing indium oxide, tin oxide, and zinc oxide and includes a connecting section, in which the tin content is higher than the zinc content at least in connecting section, and at least the connection section has crystallinity. Alternatively, in the transparent electrically conductive oxide film, the atomic percentage of zinc to the total of zinc, indium, and tin is in the range of about 1 at % through about 9 at %, the atomic ratio of tin to zinc is about 1 or more, the atomic percentage of tin to the total of zinc, indium, and tin is about 20 at % or less, and at least a portion thereof has crystallinity. An electronic apparatus provided with such a transparent electrically conductive oxide film as at least a portion of the electric circuit thereof, a target for forming a transparent electrically conductive oxide film, and a method for fabricating a substrate provided with a transparent electrically conductive oxide film are also disclosed.

摘要翻译： 透明导电氧化物膜由包含氧化铟，氧化锡和氧化锌的复合氧化物组成，并且包括至少在连接部分中锡含量高于锌含量的连接部分，并且至少连接 截面具有结晶度。 或者，在透明导电氧化物膜中，锌与锌，铟和锡的总量的原子百分比在约1at％至约9at％的范围内，锡与锌的原子比为约1 以上，锡与锌，铟和锡的合计的原子百分比为约20原子％以下，其至少一部分具有结晶性。 一种具有至少一部分电路的透明导电氧化膜的电子设备，形成透明导电氧化物膜的靶，以及具有透明导电氧化膜的基板的制造方法， 也披露。

公开(公告)号：US06433764B1

公开(公告)日：2002-08-13

申请号：US09010264

申请日：1998-01-21

申请人： Hiroyuki Hebiguchi ,  Chae Gee Sung

发明人： Hiroyuki Hebiguchi ,  Chae Gee Sung

IPC分类号： G09G336

CPC分类号： G02F1/134363 ,  G02F1/136213 ,  G09G3/3648 ,  G09G2300/0434

摘要： A liquid crystal display of a lateral electric field driving system having a high viewing angle characteristic and a high aperture ratio comprises a pair of substrates disposed with a space therebetween, a liquid crystal filling up the space between the pair of substrates, a plurality of pixel electrodes formed in a plurality of pixel regions on an inner surface of one of the pair of substrates, common electrodes each for creating an electric field of a direction parallel to the inner surface of the substrate in cooperation with each of the plurality of pixel electrodes, and capacitor forming electrodes each formed over and spaced from the pixel electrode so as to form a capacitor in combination with each of the pixel electrodes.

摘要翻译： 具有高视角特性和高开口率的横向电场驱动系统的液晶显示器包括一对在其间设置空间的基板，填充一对基板之间的空间的液晶，多个像素 形成在所述一对基板中的一个基板的内表面上的多个像素区域中的电极，每个所述公共电极用于与所述多个像素电极中的每一个配合地产生平行于所述基板的内表面的方向的电场， 以及形成在像素电极上并与像素电极间隔开的电容器形成电极，以与每个像素电极组合形成电容器。

公开(公告)号：US06432755B1

公开(公告)日：2002-08-13

申请号：US09938068

申请日：2001-08-22

申请人： Chae Gee Sung ,  Jo Gyoo Chul

发明人： Chae Gee Sung ,  Jo Gyoo Chul

IPC分类号： H01L2184

摘要： A TFT structure having sufficiently low resistance wiring is provided, in which characteristic defects thereof caused by undercuts in a barrier metal layer can be prevented, the undercuts formed in a step for processing a source and a drain electrode composed of copper. The TFT structure of the present invention comprises a gate electrode on a glass substrate, a gate insulation film, a semiconductor active layer disposed on the gate insulation film so as to oppose the gate electrode, ohmic contact layers formed on both edge portions of the semiconductor active layer, and a source and a drain electrode connected to the semiconductor active layer via the respective ohmic contact layers. In addition, the source electrode and the drain electrode are formed of copper, and barrier metal layers are formed on the bottom surfaces of the source electrode and the drain electrode above areas at which the upper surfaces of the respective ohmic contact layers are located.

公开(公告)号：US06350995B1

公开(公告)日：2002-02-26

申请号：US09599772

申请日：2000-06-22

申请人： Chae Gee Sung ,  Jo Gyoo Chul

发明人： Chae Gee Sung ,  Jo Gyoo Chul

IPC分类号： H01L0100

CPC分类号： H01L27/12 ,  H01L27/124 ,  H01L29/458 ,  H01L29/66765

摘要： A TFT structure having sufficiently low resistance wiring is provided. The present invention prevents the characteristic defects caused by undercuts in a barrier metal layer. In the prior art, the undercuts are formed by a step for processing a source and a drain electrode composed of copper. The TFT structure of the present invention comprises a gate electrode on a glass substrate, a gate insulation film, a semiconductor active layer disposed on the gate insulation film so as to oppose the gate electrode, ohmic contact layers formed on both edge portions of the semiconductor active layer, and a source and a drain electrode connected to the semiconductor active layer via the respective ohmic contact layers. In addition, the source electrode and the drain electrode are formed of copper. Barrier metal layers are formed on the bottom surfaces of the source electrode and the drain electrode above areas at which the upper surfaces of the respective ohmic contact layers are located.

摘要翻译： 提供具有足够低电阻布线的TFT结构。 本发明防止了阻挡金属层中的底切引起的特征缺陷。 在现有技术中，通过用于处理由铜组成的源电极和漏电极的步骤来形成底切。 本发明的TFT结构包括在玻璃基板上的栅极电极，栅极绝缘膜，设置在栅极绝缘膜上以与栅电极相对的半导体有源层，形成在半导体的两个边缘部分上的欧姆接触层 有源层以及经由各个欧姆接触层与半导体有源层连接的源极和漏极。 此外，源电极和漏电极由铜形成。 阻挡金属层形成在源电极和漏电极的底表面上方各欧姆接触层的上表面所在的区域上方。

公开(公告)号：US06211553B1

公开(公告)日：2001-04-03

申请号：US08976963

申请日：1997-11-24

申请人： Chae Gee Sung

发明人： Chae Gee Sung

IPC分类号： H01L2900

CPC分类号： G02F1/1368 ,  H01L29/41733 ,  H01L29/458 ,  H01L29/78621

摘要： A thin-film transistor comprises a semiconductor unit 60 constituted of a channel formation portion 61 and a source region 63 and a drain region 62 sandwiching the channel formation portion 61 therebetween, a transparent pixel electrode 54 made of indium tin oxide, a drain electrode 57 and a source electrode 58 each made of Cr, Mo, Ta or W, and a gate electrode 68 formed on the channel formation portion via a gate insulating layer 58, wherein the drain region and the source region are, respectively, connected with the electrodes through silicide layers 64, 65 formed by diffusion of the any above-mentioned element. A method for making the transistor and a liquid crystal display device comprising the transistor are also disclosed.

摘要翻译： 薄膜晶体管包括由沟道形成部分61和源极区域63以及夹在其间的沟道形成部分61的漏极区域62构成的半导体单元60，由氧化铟锡制成的透明像素电极54，漏极电极57 以及由Cr，Mo，Ta或W构成的源电极58，以及通过栅极绝缘层58形成在沟道形成部上的栅电极68，其中漏极区域和源极区域分别与电极 通过由任何上述元件的扩散形成的硅化物层64,65。 还公开了制造晶体管的方法和包括晶体管的液晶显示装置。

公开(公告)号：US06800502B2

公开(公告)日：2004-10-05

申请号：US10020610

申请日：2001-12-07

申请人： Chae Gee Sung

发明人： Chae Gee Sung

IPC分类号： H01L2904

CPC分类号： H01L29/4908

摘要： The invention intends to provide a TFT having a gate insulating film which has a high dielectric withstand voltage and can ensure a desired carrier mobility in an adjacent semiconductor active film. A gate electrode and a semiconductor active film are formed on a transparent substrate with a gate insulating film, which is formed of two layered insulating films, held between them. The gate insulating film is made up of a first gate insulating film which improves a withstand voltage between the gate electrode and the semiconductor active film, and a second gate insulating film which improves an interface characteristic between the gate insulating film and the semiconductor active film. The first and second gate insulating films are each formed of a SiNx film. The optical band gap of the first gate insulating film has a value in the range of 3.0 to 4.5 eV, and the optical band gap of the second gate insulating film has a value in the range of 5.0 to 5.3 eV.