Memory device for resistance-based memory applications
    12.
    发明授权
    Memory device for resistance-based memory applications 有权
    用于基于电阻的存储器应用的存储器件

    公开(公告)号:US08228714B2

    公开(公告)日:2012-07-24

    申请号:US12206933

    申请日:2008-09-09

    IPC分类号: G11C11/00

    CPC分类号: G11C11/1673

    摘要: In a particular embodiment, a memory device is disclosed that includes a memory cell including a resistance-based memory element coupled to an access transistor. The access transistor has a first oxide thickness to enable operation of the memory cell at an operating voltage. The memory device also includes a first amplifier configured to couple the memory cell to a supply voltage that is greater than a voltage limit to generate a data signal based on a current through the memory cell. The first amplifier includes a clamp transistor that has a second oxide thickness that is greater than the first oxide thickness. The clamp transistor is configured to prevent the operating voltage at the memory cell from exceeding the voltage limit.

    摘要翻译: 在特定实施例中,公开了一种存储器件,其包括存储单元,该存储单元包括耦合到存取晶体管的基于电阻的存储元件。 存取晶体管具有第一氧化物厚度,以使得能够在工作电压下操作存储单元。 存储器件还包括第一放大器,其被配置为将存储器单元耦合到大于电压限制的电源电压,以基于通过存储器单元的电流来产生数据信号。 第一放大器包括具有大于第一氧化物厚度的第二氧化物厚度的钳位晶体管。 钳位晶体管被配置为防止存储器单元处的工作电压超过电压限制。

    Digitally-controllable delay for sense amplifier
    14.
    发明授权
    Digitally-controllable delay for sense amplifier 有权
    读数放大器的数字可控延时

    公开(公告)号:US07936590B2

    公开(公告)日:2011-05-03

    申请号:US12329941

    申请日:2008-12-08

    IPC分类号: G11C11/00

    摘要: Circuits, apparatuses, and methods of interposing a selectable delay in reading a magnetic random access memory (MRAM) device are disclosed. In a particular embodiment, a circuit includes a sense amplifier, having a first input, a second input, and an enable input. A first amplifier coupled to an output of a magnetic resistance-based memory cell and a second amplifier coupled to a reference output of the cell also are provided. The circuit further includes a digitally-controllable amplifier coupled to a tracking circuit cell. The tracking circuit cell includes at least one element that is similar to the cell of the magnetic resistance-based memory. The first input of the sense amplifier is coupled to the first amplifier, the second input of the sense amplifier is coupled to the second amplifier, and the enable input is coupled to the third digitally-controllable amplifier via a logic circuit. The sense amplifier may generate an output value based on the amplified values received from the output of the magnetic resistance-based memory cell and the reference cell once the sense amplifier receives an enable signal from the digitally-controllable amplifier via the logic circuit.

    摘要翻译: 公开了在读取磁随机存取存储器(MRAM)装置中插入可选延迟的电路,装置和方法。 在特定实施例中,电路包括具有第一输入,第二输入和使能输入的读出放大器。 还提供耦合到基于磁阻的存储器单元的输出的第一放大器和耦合到单元的参考输出的第二放大器。 电路还包括耦合到跟踪电路单元的数字可控放大器。 跟踪电路单元包括与基于磁阻的存储器的单元相似的至少一个元件。 读出放大器的第一输入耦合到第一放大器,读出放大器的第二输入耦合到第二放大器,并且使能输入经由逻辑电路耦合到第三数字可控放大器。 一旦读出放大器经由逻辑电路接收到来自数字可控放大器的使能信号,读出放大器可以基于从基于磁阻的存储单元和参考单元的输出接收的放大值产生输出值。

    Method and system for detecting vehicle position by employing polarization image
    16.
    发明授权
    Method and system for detecting vehicle position by employing polarization image 有权
    采用偏振图像检测车辆位置的方法和系统

    公开(公告)号:US08983126B2

    公开(公告)日:2015-03-17

    申请号:US13589393

    申请日:2012-08-20

    IPC分类号: G06K9/00

    CPC分类号: G06K9/00805 G06K9/00798

    摘要: Disclosed are a method and a system for detecting a vehicle position by employing a polarization image. The method comprises a step of capturing a polarization image by using a polarization camera; a step of acquiring two road shoulders in the polarization image based on a difference between a road surface and each of the two road shoulders in the polarization image, and determining a part between the two road shoulders as the road surface; a step of detecting at least one vehicle bottom from the road surface based on a significant pixel value difference between each wheel and the road surface in the polarization image; and a step of generating a vehicle position from the vehicle bottom based on a pixel value difference between a vehicle outline corresponding to the vehicle bottom and background in the polarization image.

    摘要翻译: 公开了一种通过采用偏振图像来检测车辆位置的方法和系统。 该方法包括通过使用偏振照相机捕获偏振图像的步骤; 基于所述偏振图像中的路面与所述两个路肩中的每一个之间的差异,在所述偏振图像中获取两个路肩的步骤,以及确定所述两个路肩之间的部分作为所述路面; 基于所述偏振图像中的每个车轮与所述路面之间的有效像素值差异,从所述路面检测至少一个车辆底部的步骤; 以及基于车辆底部对应的车辆轮廓与偏振图像中的背景之间的像素值差异,从车辆底部产生车辆位置的步骤。

    Night-scene light source detecting device and night-scene light source detecting method
    17.
    发明授权
    Night-scene light source detecting device and night-scene light source detecting method 有权
    夜景光源检测装置和夜景光源检测方法

    公开(公告)号:US08655060B2

    公开(公告)日:2014-02-18

    申请号:US13333492

    申请日:2011-12-21

    IPC分类号: G06K9/00

    摘要: A night-scene light source detecting device includes a pixel value obtaining unit configured to obtain a pixel value of each pixel in an input image; a night-scene-feature extraction unit provided for extracting a zone area of a mean corrected-brightness value and a high corrected-brightness value of the input image as two night-scene features based on the pixel value of each pixel in the input image; a night-scene image detection unit provided for determining whether the input image is a night-scene image or not based on the two night-scene features; a specific color detection unit provided for detecting whether each pixel belongs to specific color or not; and a night-scene light source determining unit provided for determining whether the night-scene image is picked up under irradiation by the specific light sources in a night scene or not based on the result of the specific color detection.

    摘要翻译: 夜景光源检测装置包括:像素值获取单元,被配置为获得输入图像中的每个像素的像素值; 夜景特征提取单元,用于基于输入图像中的每个像素的像素值,将输入图像的平均校正亮度值和高校正亮度值的区域区域提取为两个夜景特征 ; 夜景图像检测单元,用于基于所述两个夜景特征来确定所述输入图像是否为夜景图像; 用于检测每个像素是否属于特定颜色的特定颜色检测单元; 以及夜景光源确定单元,用于基于特定颜色检测的结果来确定是否在夜景中通过特定光源在特定光源的照射下拾取夜景场景图像。

    Apparatus to Implement Symmetric Single-Ended Termination in Differential Voltage-Mode Drivers
    18.
    发明申请
    Apparatus to Implement Symmetric Single-Ended Termination in Differential Voltage-Mode Drivers 有权
    在差分电压模式驱动器中实现对称单端终止的装置

    公开(公告)号:US20130082744A1

    公开(公告)日:2013-04-04

    申请号:US13248485

    申请日:2011-09-29

    IPC分类号: H03K3/00

    CPC分类号: H04L25/0274 H04L25/0278

    摘要: A differential voltage mode driver for implementing symmetric single ended termination includes an output driver circuitry having a predefined termination impedance. The differential voltage mode driver also includes an output driver replica having independently controlled first and second portions. The first and second portions are independently controlled to establish a substantially equal on-resistance of the first and the second portions. The output driver replica controls the predefined termination impedance of the output driver circuitry.

    摘要翻译: 用于实现对称单端终端的差分电压模式驱动器包括具有预定义的终端阻抗的输出驱动器电路。 差分电压模式驱动器还包括具有独立控制的第一和第二部分的输出驱动器副本。 独立地控制第一和第二部分以建立第一和第二部分的基本相等的导通电阻。 输出驱动器副本控制输出驱动器电路的预定终止阻抗。

    Memory Device for Resistance-Based Memory Applications
    19.
    发明申请
    Memory Device for Resistance-Based Memory Applications 有权
    用于基于电阻的存储器应用的存储器件

    公开(公告)号:US20100061144A1

    公开(公告)日:2010-03-11

    申请号:US12206933

    申请日:2008-09-09

    IPC分类号: G11C11/00 G11C7/00

    CPC分类号: G11C11/1673

    摘要: In a particular embodiment, a memory device is disclosed that includes a memory cell including a resistance-based memory element coupled to an access transistor. The access transistor has a first oxide thickness to enable operation of the memory cell at an operating voltage. The memory device also includes a first amplifier configured to couple the memory cell to a supply voltage that is greater than a voltage limit to generate a data signal based on a current through the memory cell. The first amplifier includes a clamp transistor that has a second oxide thickness that is greater than the first oxide thickness. The clamp transistor is configured to prevent the operating voltage at the memory cell from exceeding the voltage limit.

    摘要翻译: 在特定实施例中,公开了一种存储器件,其包括存储单元,该存储单元包括耦合到存取晶体管的基于电阻的存储元件。 存取晶体管具有第一氧化物厚度,以使得能够在工作电压下操作存储单元。 存储器件还包括第一放大器,其被配置为将存储器单元耦合到大于电压限制的电源电压,以基于通过存储器单元的电流来产生数据信号。 第一放大器包括具有大于第一氧化物厚度的第二氧化物厚度的钳位晶体管。 钳位晶体管被配置为防止存储器单元处的工作电压超过电压限制。

    Address Multiplexing in Pseudo-Dual Port Memory
    20.
    发明申请
    Address Multiplexing in Pseudo-Dual Port Memory 有权
    伪双端口存储器中的地址复用

    公开(公告)号:US20090231937A1

    公开(公告)日:2009-09-17

    申请号:US12047593

    申请日:2008-03-13

    IPC分类号: G11C7/22 G11C8/00

    CPC分类号: G11C7/1072 G11C7/22

    摘要: A pseudo-dual port memory address multiplexing system includes a control circuit operative to identify a read request and a write request to be accomplished during a single clock cycle. A self time tracking circuit monitors a read operation and generates a switching signal when the read operation is determined to be complete. A multiplexer is responsive to the switching signal for selectively providing a read address and a write address to a memory address unit at the proper time.

    摘要翻译: 伪双端口存储器地址复用系统包括控制电路,其操作用于识别在单个时钟周期期间要完成的读请求和写请求。 当读取操作被确定为完成时,自身时间跟踪电路监视读取操作并产生切换信号。 复用器响应于切换信号,用于在适当的时间选择性地向存储器地址单元提供读取地址和写入地址。