Abstract:
Provided is a method of performing a maskless lithography process. The method includes providing a proximity correction pattern. The method includes generating a deformed pattern based on the proximity correction pattern. The method includes performing a first convolution process to the proximity correction pattern to generate a first proximity correction pattern contour. The method includes processing the first proximity correction pattern contour to generate a second proximity correction pattern contour. The method includes performing a second convolution process to the deformed pattern to generate a first deformed pattern contour. The method includes processing the first deformed pattern contour to generate a second deformed pattern contour. The method includes identifying mismatches between the second proximity correction pattern contour and the second deformed pattern contour. The method includes determining whether the deformed pattern is lithography-ready in response to the identifying.
Abstract:
The present invention discloses a thin-film transistor liquid crystal display device, a substrate, and a manufacturing method. The thin-film transistor liquid crystal display device includes: a substrate and a signal line, a scan line, a pixel electrode, and a thin-film transistor that are formed on the substrate. The signal line and the scan line are arranged to intersect each other. The pixel electrode is located in a pixel display zone enclosed by the intersected signal line and scan line. The thin-film transistor includes a gate terminal, a source terminal, and a drain terminal. The gate terminal is electrically connected to the scan line. The drain terminal is electrically connected to the signal line. The source terminal is arranged at a position corresponding to the intersection of the signal line and the scan line and is electrically connected to the pixel electrode. With the above arrangement, the present invention can significantly reduce the amount of area of the pixel electrode occupied, increases the opening ratio of the pixel, and greatly reduces the influence on the alignment of the liquid crystal molecules thereby reducing asymmetry of the pixel quadrant and improving image quality.
Abstract:
A display apparatus and a method for driving a display panel thereof are provided. The display apparatus comprises a display panel and a gate driver. The display panel comprises two gate lines, two source lines, a pixel and two transistors. The pixel is electrically coupled to the two gate lines and the two source lines through the two transistors respectively. The gate driver is for providing a first pulse to one of the gate lines according to a predetermined frequency and providing a second pulse to another one according to the predetermined frequency. An enabling period of the second pulse is behind an enabling period of the first pulse, and a predetermined time interval is existed between a rising edge of the second pulse and a rising edge of the first pulse. The predetermined time interval is longer than a time length of the enabling period of the first pulse.
Abstract:
A method for step-and-align interference lithography is provided in the present invention, by which a displacement error relating to the moving of an interference light beam as the source of the interference light beam is being carried to move by a carrier is measured before interference lithography, and then the displacement error is used as a reference to compensate a positioning error between adjacent interference patterns during step-and-align interference lithography. Besides, the present invention further provides a system for step-and-align interference lithography, which is capable of compensating the positioning error caused by a stepping movement control used for moving a substrate or the light beams in a stepwise manner to form interference-patterned regions by interference lithography and thus the so-generated interference-patterned regions are accurate aligned with one another on a two-dimensional plane for preparing the same to be stitched together to form a two-dimensional large-area periodic structure.
Abstract:
An optical disk drive for accessing data stored on a compact disc has a housing, a sled sliding inside the housing, a driving device for driving the sled, an actuator installed on the sled, a servo device for providing a push force to drive the actuator, a control circuitry for controlling operations of the optical disk drive, an adaptive compensator, and an error signal generation circuit. The actuator can move within a predetermined range on the sled, wherein the predetermined range includes a linear region and a non-linear region. It is desirable to keep the actuator within the linear region of the predetermined range. For this, an adaptive compensator is used to provide a supplementary force to the sled when the actuator is near the non-linear region.
Abstract:
An optical disk drive for accessing data stored on a compact disc has a housing, a sled sliding inside the housing, a driving device for driving the sled, an actuator installed on the sled, a servo device for providing a push force to drive the actuator, a control circuitry for controlling operations of the optical disk drive, an adaptive compensator, and an error signal generation circuit. The actuator can move within a predetermined range on the sled, wherein the predetermined range includes a linear region and a non-linear region. It is desirable to keep the actuator within the linear region of the predetermined range. For this, an adaptive compensator is used to provide a supplementary force to the sled when the actuator is near the non-linear region.
Abstract:
The present invention discloses an apparatus for applying curing voltages to a liquid crystal substrate. The apparatus includes a plurality of probes, a detecting unit, and an alarm unit. The probes are utilized to apply a voltage to the liquid crystal substrate. The detecting unit is electrically coupled to the probes for determining whether the curing voltages are within a threshold range. The alarm unit is electrically coupled to the detecting unit for giving an alarm prompt when the voltage is not within the threshold range, so as to remind a person without delay. Therefore, the curing voltage applying apparatus of the present invention is capable of increasing product yield, so as to reduce production costs.
Abstract:
A thin-film transistor liquid crystal display device includes: a substrate and a signal line, a scan line, a pixel electrode, and a thin-film transistor that are formed on the substrate. The signal line and the scan line are arranged to intersect each other. The pixel electrode is located in a pixel display zone enclosed by the intersected signal line and scan line. The thin-film transistor includes a gate terminal, a source terminal, and a drain terminal. The gate terminal is electrically connected to the scan line. The drain terminal is electrically connected to the signal line. The source terminal is arranged at a position corresponding to the intersection of the signal line and the scan line and is electrically connected to the pixel electrode.
Abstract:
The present disclosure provides a method of increasing the wafer throughput by an electron beam lithography system. The method includes scanning a wafer using the maximum scan slit width (MSSW) of the electron beam writer. By constraining the integrated circuit (IC) field size to allow the MSSW to cover a complete field, the MSSW is applied to decrease the scan lanes of a wafer and thereby increase the throughput. When scanning the wafer with the MSSW, the next scan lane data can be rearranged and loaded into a memory buffer. Thus, once one scan lane is finished, the next scan lane data in the memory buffer is read for scanning.
Abstract:
The present disclosure provides a dithering method of increasing wafer throughput by an electron beam lithography system. The dithering method generates an edge map from a vertex map. The vertex map is generated from an integrated circuit design layout (such as an original pattern bitmap). A gray map (also referred to as a pattern gray map) is also generated from the integrated circuit design layout. By combining the edge map with the gray map, a modified integrated circuit design layout (modified pattern bitmap) is generated for use by the electron beam lithography system.