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公开(公告)号：US11728779B2
公开(公告)日：2023-08-15
申请号：US16745511
申请日：2020-01-17
Inventor： Jeffrey A. May , Eric J. King , Christian Larsen , Eric Eklund
CPC classification number: H03G3/007 , H02M3/04 , H03F3/20 , H03G3/004 , H03G3/3005 , H03F2200/03 , H04R3/00
Abstract: A power converter may include an input for receiving an input signal and output for generating an intermediate signal that is a power converted signal from the input signal wherein the intermediate signal is determined based on various parameters of a signal path that utilizes the intermediate signal, wherein the various parameters comprise one or more of the following: a peak output signal of the signal path, energy requested over a period of time by the signal path, available energy from an energy source to the power converter, stored energy at an output of the power converter, and stored energy of a battery for providing electrical energy at the input.
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公开(公告)号：US10659887B2
公开(公告)日：2020-05-19
申请号：US16001596
申请日：2018-06-06
Inventor： Eric J. King , Christian Larsen , Anthony S. Doy
IPC: H03F3/217 , H04R17/00 , H03F3/183 , H04R3/00 , H03F3/187 , H02M3/07 , H02M1/00 , H02M3/158 , H04R1/10
Abstract: A system may include a charge pump configured to transfer electrical energy from a source of electrical energy coupled to an input of the charge pump to an energy storage device coupled to an output of the charge pump and configured to store the electrical energy transferred from the source of electrical energy, a power converter configured to transfer electrical energy from the energy storage device to an output of the power converter, wherein the power converter comprises a first plurality of switches and a power inductor arranged such that one switch of the first plurality of switches is coupled between the power inductor and the output of the charge pump, an output stage configured to transfer electrical energy between the output of the power converter to a load coupled to an output of the output stage, the output stage comprising a second plurality of switches, and a controller configured to generate an output voltage at the output of the output stage as an amplified version of an input signal.
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公开(公告)号：US10193505B2
公开(公告)日：2019-01-29
申请号：US15661446
申请日：2017-07-27
Inventor： Emmanuel Marchais , Lingli Zhang , Eric J. King , Christian Larsen
Abstract: In accordance with embodiments of the present disclosure, a system may have a configurable control loop technology, wherein the system comprises a first mode control loop, a second mode control loop and a reconfigurable pulse width modulator (PWM) configured to generate an output signal from an input signal. The reconfigurable PWM may include a digital PWM and an analog PWM and may be configured such that when the first mode control loop is activated, the reconfigurable PWM utilizes the analog PWM to generate the output signal from the input signal and when the second mode control loop is activated, the reconfigurable PWM utilizes the digital PWM to generate the output signal from the input signal and the digital PWM receives its input from a digital proportional integral derivative controller.
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公开(公告)号：US20170272042A1
公开(公告)日：2017-09-21
申请号：US15072097
申请日：2016-03-16
Inventor： Shanjen Pan , Marc L. Tarabbia , Christian Larsen
IPC: H03F3/185 , H03F3/217 , H01L27/02 , H01L21/8234 , H01L29/08 , H01L27/088
CPC classification number: H03F3/185 , H01L21/823418 , H01L21/823425 , H01L21/823475 , H01L21/823481 , H01L27/0207 , H01L27/088 , H01L28/00 , H01L29/0696 , H01L29/0847 , H01L29/66659 , H03F3/187 , H03F3/2171 , H03F3/2178 , H03F3/45475 , H03F2200/03 , H03F2200/366
Abstract: Transistors may be manufactured with a shared drain to reduce die area consumed by circuitry. In one example, two transistors can be manufactured that include two body regions that abut a shared drain region. The two transistors can be independently operated by coupling terminals to a source and a gate for each transistor and the shared drain. Characteristics of the two transistors can be controlled by adjusting feature sizes, such as overlap between the gate and the shared drain for a transistor. In particular, two transistors with different voltage requirements can be manufactured using a shared drain structure, which can be useful in amplifier circuitry and in particular Class-D amplifiers.
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15.发明授权公开(公告)号：US11296666B1
公开(公告)日：2022-04-05
申请号：US16796475
申请日：2020-02-20
Inventor： Christian Larsen , John L. Melanson
Abstract: A high CMRR current monitoring circuit includes a first stage that receives a current sense signal, a voltage across a current sense resistor in series with an output of a class-D amplifier. First stage is powered by at least one floating supply and/or reference that tracks the amplifier output. First stage applies gain to the current sense signal to generate an intermediate signal. A second stage receives the intermediate signal and is powered by a ground-referenced supply and provides an amplified representation of the current sense signal. The floating supply is supplied by a capacitive-coupled power source driven by the ground-referenced supply. The second stage output may be a voltage relative to ground or a digital signal. The intermediate signal may be a current, digital signal, or amplified version of the current sense signal voltage. The first stage may be a transconductance amplifier and the second stage a transimpedance amplifier.
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Patent Agency Ranking
公开(公告)号：US10917052B2
公开(公告)日：2021-02-09
申请号：US16376664
申请日：2019-04-05
Inventor： Shanjen Pan , Marc L. Tarabbia , Christian Larsen
IPC: H03F3/217 , H01L27/02 , H01L21/8234 , H01L29/08 , H03F3/185 , H03F3/187 , H03F3/45 , H01L49/02 , H01L29/66 , H01L29/06 , H01L27/088
Abstract: Transistors may be manufactured with a shared drain to reduce die area consumed by circuitry. In one example, two transistors can be manufactured that include two body regions that abut a shared drain region. The two transistors can be independently operated by coupling terminals to a source and a gate for each transistor and the shared drain. Characteristics of the two transistors can be controlled by adjusting feature sizes, such as overlap between the gate and the shared drain for a transistor. In particular, two transistors with different voltage requirements can be manufactured using a shared drain structure, which can be useful in amplifier circuitry and in particular Class-D amplifiers.
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公开(公告)号：US10581322B2
公开(公告)日：2020-03-03
申请号：US15783506
申请日：2017-10-13
Inventor： Eric J. King , Aaron J. Brennan , Christian Larsen , John L. Melanson , Yongjie Cheng , Adrian Colli-Menchi
Abstract: A system may include a charge pump configured to operate in a plurality of modes including a first mode in which the ratio of an output voltage to an input voltage of the charge pump is a first ratio and a second mode in which the ratio is a second ratio and a controller configured to limit current flowing between a power source of the charge pump to the charge pump, wherein the power source provides the input voltage, by limiting a transfer of charge between the power source and the charge pump during a switching cycle of the charge pump responsive to a change in operation between modes of the plurality of modes.
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公开(公告)号：US20190238104A1
公开(公告)日：2019-08-01
申请号：US16376664
申请日：2019-04-05
Inventor： Shanjen Pan , Marc L. Tarabbia , Christian Larsen
IPC: H03F3/185 , H01L29/06 , H01L29/08 , H01L49/02 , H01L29/66 , H01L21/8234 , H03F3/217 , H03F3/45 , H03F3/187 , H01L27/088
CPC classification number: H03F3/185 , H01L21/823418 , H01L21/823425 , H01L21/823475 , H01L21/823481 , H01L27/0207 , H01L27/088 , H01L28/00 , H01L29/0696 , H01L29/0847 , H01L29/66659 , H03F3/187 , H03F3/2171 , H03F3/2178 , H03F3/45475 , H03F2200/03 , H03F2200/366
Abstract: Transistors may be manufactured with a shared drain to reduce die area consumed by circuitry. In one example, two transistors can be manufactured that include two body regions that abut a shared drain region. The two transistors can be independently operated by coupling terminals to a source and a gate for each transistor and the shared drain. Characteristics of the two transistors can be controlled by adjusting feature sizes, such as overlap between the gate and the shared drain for a transistor. In particular, two transistors with different voltage requirements can be manufactured using a shared drain structure, which can be useful in amplifier circuitry and in particular Class-D amplifiers.
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公开(公告)号：US10298184B2
公开(公告)日：2019-05-21
申请号：US15072097
申请日：2016-03-16
Inventor： Shanjen Pan , Marc L. Tarabbia , Christian Larsen
IPC: H03F3/217 , H01L27/02 , H01L21/8234 , H01L29/08 , H03F3/185 , H01L27/088 , H03F3/187 , H03F3/45 , H01L49/02 , H01L29/66 , H01L29/06
Abstract: Transistors may be manufactured with a shared drain to reduce die area consumed by circuitry. In one example, two transistors can be manufactured that include two body regions that abut a shared drain region. The two transistors can be independently operated by coupling terminals to a source and a gate for each transistor and the shared drain. Characteristics of the two transistors can be controlled by adjusting feature sizes, such as overlap between the gate and the shared drain for a transistor. In particular, two transistors with different voltage requirements can be manufactured using a shared drain structure, which can be useful in amplifier circuitry and in particular Class-D amplifiers.
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公开(公告)号：US10230300B2
公开(公告)日：2019-03-12
申请号：US15497010
申请日：2017-04-25
Inventor： Jingjing Yu , Christian Larsen
Abstract: In accordance with embodiments of the present disclosure, a system for power conversion may include a power converter comprising a power inductor and a switch coupled to the power inductor and a predriver system for electrically driving a gate of the switch, the predriver system configured to operate in a plurality of modes including a high-power mode in which the predriver system is supplied with electrical energy from a first power supply having a first supply voltage and a low-power mode in which the predriver system is supplied with electrical energy from a second power supply having a second supply voltage significantly lesser than the first supply voltage.
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