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公开(公告)号：US11300987B1
公开(公告)日：2022-04-12
申请号：US17214310
申请日：2021-03-26
Inventor： Kathryn R. Holland , Wesley L. Mokry , Neel Pramanik , Christian Larsen
IPC: G05F1/46
Abstract: A system may include an integrated circuit comprising an on-chip power supply and an internal power rail, a gate-controlled supply switch configured to be coupled between the on-chip power supply and an external power supply such that the internal power rail is regulated by the on-chip power supply when the gate-controlled supply switch is open and the internal power rail is regulated by the external power supply when the gate-controlled supply switch is closed, and a control circuit configured to monitor conditions associated with the on-chip power supply when the gate-controlled supply switch is transitioning between switch states and based on the conditions, control a rate of charging or discharging of a capacitance coupled to a gate of the gate-controlled supply switch.
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公开(公告)号：US10114392B2
公开(公告)日：2018-10-30
申请号：US15800743
申请日：2017-11-01
Inventor： Eric J. King , Christian Larsen , Aaron J. Brennan
Abstract: A method of increasing a multiplication ratio of a charge pump, the multiplication ratio defining a relationship between an output voltage of the charge pump and an input voltage of the charge pump, comprising: analyzing a first efficiency of the charge pump when the multiplication ratio is at a first ratio, calculating a second efficiency of the charge pump when the multiplication ratio is a second ratio lesser than the first ratio, and based on the first efficiency and the second efficiency, determining at least one of a target output power and a target output voltage at which to change the multiplication ratio from the second ratio to the first ratio.
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公开(公告)号：US11953531B2
公开(公告)日：2024-04-09
申请号：US17118330
申请日：2020-12-10
Inventor： Kathryn R. Holland , Bo-Ren Wang , Ravi K. Kummaraguntla , Graeme G. Mackay , Christian Larsen
Abstract: An apparatus may include a sense resistor comprising a plurality of parallel-coupled resistor elements, a plurality of positive voltage sense points, and a plurality of negative voltage sense points. A first passive combination network may be configured to combine the plurality of positive voltage sense points into a single positive sense terminal and a second passive combination network may be configured to combine the plurality of negative voltage sense points into a single negative sense terminal. The first passive combination network and the second passive combination network may be arranged such that a sense voltage is measurable between the single positive sense terminal and the single negative sense terminal and a dependence of the sense voltage on a variation in current density in the parallel-coupled resistor elements is minimized.
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公开(公告)号：US11909317B2
公开(公告)日：2024-02-20
申请号：US18174106
申请日：2023-02-24
Inventor： Eric J. King , Ajit Sharma , Lingli Zhang , Christian Larsen , Graeme G. Mackay
Abstract: A system may include a power converter having a maximum allowable input power drawn from a power source, an energy storage element coupled to an output of the power converter at a top plate of the energy storage element, wherein the energy storage element is configured to store excess energy, and control circuitry configured to, when an input power of the power converter exceeds the maximum allowable input power, cause excess energy stored in the energy storage element to be consumed by circuitry coupled to the output of the power converter, and in order to maintain positive voltage headroom for the circuitry coupled to the output of the power converter, selectively couple a bottom plate of the energy storage element to the power source such that excess energy stored by the circuitry coupled to the output of the power converter is consumed from the energy storage device when the input power of the power converter exceeds the maximum allowable input power.
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公开(公告)号：US10901012B2
公开(公告)日：2021-01-26
申请号：US16354781
申请日：2019-03-15
Inventor： Katy Holland , Vamsikrishna Parupalli , Christian Larsen , Graeme Mackay
Abstract: A method for calculating a calibration gain used for common-mode rejection in a current sensing system may include measuring a first value of a common-mode voltage associated with the current sensing system and a first output value of the current sensing system occurring at the first value of the common-mode voltage, measuring a second value of the common-mode voltage associated with the current sensing system and a second output value of the current sensing system occurring at the second value of the common-mode voltage, and based on a difference between the second output value of the current sensing system and the first output value of the current sensing system and a difference between the second value of the common-mode voltage and the first value of the common-mode voltage, calculating the calibration gain.
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Patent Agency Ranking
公开(公告)号：US10586865B2
公开(公告)日：2020-03-10
申请号：US15720977
申请日：2017-09-29
Inventor： Scott Warrick , Justin Dougherty , Alexander Barr , Christian Larsen , Marc L. Tarabbia , Ying Ying
IPC: H01L29/78 , H01L29/40 , H01L29/786 , H01L29/06 , H01L21/761 , H01L21/762 , H01L29/423
Abstract: A dual-gate metal-oxide-semiconductor field-effect transistor (MOSFET) may include a MOSFET having a channel region, a drain, and a source, a first gate formed proximate to the channel region, a drain extension region formed proximate to the drain, and a second gate formed proximate to the drain extension region.
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公开(公告)号：US11621683B2
公开(公告)日：2023-04-04
申请号：US17162229
申请日：2021-01-29
Inventor： Wei Xu , Ravi Kummaraguntla , Paul Wilson , Mujo Kozak , Christian Larsen , John L. Melanson , Yongjie Cheng
IPC: H03F3/45
Abstract: A system may include a front end differential amplifier having two input terminals, two input resistors, each of the two input resistors coupled to a respective one of the two input terminals, and an input common mode biasing circuit for an output stage of the front end differential amplifier, the input common mode biasing circuit comprising two current sources configured to generate currents for biasing the output stage of the front end differential amplifier.
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公开(公告)号：US11387732B2
公开(公告)日：2022-07-12
申请号：US16916395
申请日：2020-06-30
Inventor： Eric J. King , Ajit Sharma , Lingli Zhang , Christian Larsen , Graeme G. Mackay
Abstract: A system may include a power converter having a maximum allowable input power drawn from a power source, an energy storage element coupled to an output of the power converter at a top plate of the energy storage element, wherein the energy storage element is configured to store excess energy, and control circuity configured to, when an input power of the power converter exceeds the maximum allowable input power, cause excess energy stored in the energy storage element to be consumed by circuitry coupled to the output of the power converter, and in order to maintain positive voltage headroom for the circuitry coupled to the output of the power converter, selectively couple a bottom plate of the energy storage element to the power source such that excess energy stored by the circuitry coupled to the output of the power converter is consumed from the energy storage device when the input power of the power converter exceeds the maximum allowable input power.
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公开(公告)号：US10205672B2
公开(公告)日：2019-02-12
申请号：US15226197
申请日：2016-08-02
Inventor： Jeffrey A. May , Vivek Jindal , Anu Chakravarty , Terence C. Bowness , Christian Larsen
IPC: H04L12/863 , H04L29/08 , H04L12/40 , G06F13/372
Abstract: A distributed network system may include a shared communication bus that operates in accordance with a communication protocol and a plurality of devices coupled to the shared communication bus. The communication protocol may define periods of time and an order by which each of the plurality of devices actively transmit data on the shared communication bus such that only one of the plurality of devices actively transmits data on the shared communication bus at a time to a remaining number of the plurality of devices through the shared communication bus. When the remaining number of the plurality of devices are not actively transmitting data, the remaining number of the plurality of devices may receive data via the shared communication bus so that bi-directional communication is established among the plurality of devices on the shared communication bus.
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公开(公告)号：US12182489B2
公开(公告)日：2024-12-31
申请号：US16852640
申请日：2020-04-20
Inventor： Michael R. Kobe , David Kostusiak , Christian Larsen
IPC: G06F30/398 , G06F30/20
Abstract: A method for enforcing design rules in a circuit layout may include providing a circuit schematic for an integrated circuit to a circuit simulator, wherein the circuit layout is derived from a circuit schematic, using the circuit simulator to simulate the circuit schematic and generate simulated electrical parameters for the integrated circuit, and using the simulated electrical parameters to enforce physical design rules when generating the circuit layout based on the simulated electrical parameters.
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