公开(公告)号：US20150347051A1

公开(公告)日：2015-12-03

申请号：US14348143

申请日：2013-05-10

Applicant: EMPIRE TECHNOLOGY DEVELOPMENT, LLC

Inventor： EZEKIEL KRUGLICK

IPC: G06F3/06

CPC classification number: G06F3/0622 ,  G06F3/0637 ,  G06F3/0673 ,  G06F9/45558 ,  G06F12/1458 ,  G06F2009/45583 ,  Y02D10/13

Abstract: Technologies are generally described for systems, devices and methods effective to accelerate memory access. A memory unit, including a memory and a programmable circuit, may be in communication with a processor executing a virtual machine. The memory unit may receive from the processor, a request to configure the programmable circuit in accordance with a program. The program may be associated with the virtual machine. The programmable circuit may be configured in accordance with the program. The programmable circuit may then be operated to perform one or more operations on data in the memory.

Abstract translation: 一般描述了有效加速内存访问的系统，设备和方法的技术。 包括存储器和可编程电路的存储器单元可以与执行虚拟机的处理器通信。 存储器单元可以从处理器接收根据程序配置可编程电路的请求。 程序可能与虚拟机相关联。 可编程电路可以根据程序进行配置。 然后可操作可编程电路以对存储器中的数据执行一个或多个操作。

公开(公告)号：US20150263923A1

公开(公告)日：2015-09-17

申请号：US14725874

申请日：2015-05-29

Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLC

Inventor： EZEKIEL KRUGLICK

IPC: H04L12/26 ,  H04L29/08 ,  G06F9/455

CPC classification number: H04L43/0852 ,  G06F9/45558 ,  G06F2009/45575 ,  G06F2009/45595 ,  H04L47/283 ,  H04L67/142

Abstract: Technologies related to virtual machine switching based on measured network delay are generally described. A network delay aware Virtual Machine (VM) may be configured to adapt a Virtual Machine Monitor (VMM) to delay switching back to the network delay aware VM by a delay amount determined using a measured network delay. The measured network delay may comprise a delay between sending a network communication and receiving a network response. By delaying switching back to the network delay aware VM, additional processing resources are freed for other VMs managed by the VMM, thereby increasing efficiency of computing devices including network delay aware VMs, and correspondingly increasing efficiency of data centers including such computing devices.

Abstract translation: 通常描述与基于测量网络延迟的虚拟机切换相关的技术。 网络延迟感知虚拟机（VM）可以被配置为使虚拟机监视器（VMM）适应延迟切换到网络延迟感知VM的延迟量，该延迟量使用测量的网络延迟确定。 测量的网络延迟可以包括在发送网络通信和接收网络响应之间的延迟。 通过延迟切换回网络延迟感知VM，为VMM管理的其他VM释放额外的处理资源，从而提高包括网络延迟感知VM在内的计算设备的效率，并相应提高包括这些计算设备在内的数据中心的效率。

公开(公告)号：US20150006628A1

公开(公告)日：2015-01-01

申请号：US14488453

申请日：2014-09-17

Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLC

Inventor： EZEKIEL KRUGLICK

IPC: G06F17/30 ,  G06F3/06

CPC classification number: G06F17/30079 ,  G06F3/0647 ,  G06F9/5072 ,  G06F17/303 ,  H04L67/34

Abstract: Technologies related to migration in place are generally described. In some examples, software and/or data associated with a platform customer can be “migrated” to a new platform while allowing the platform customer's software and/or data to remain on same hardware. A data center and/or Infrastructure as a Service (IaaS) provider may be configured to support migration in place for example by providing hardware identifiers upon request, providing platform identifiers upon request, providing platform compatibility information upon request and/or approving platforms for migration in place operations, deploying platform modules to migration in place hardware, providing user session support during migration in place operations, and/or performing security operations.

Abstract translation: 通常描述与移动有关的技术。 在一些示例中，与平台客户相关联的软件和/或数据可以被“迁移”到新平台，同时允许平台客户的软件和/或数据保持在相同的硬件上。 数据中心和/或基础架构即服务（IaaS）提供商可以被配置为支持移植，例如通过根据请求提供硬件标识符，根据请求提供平台标识符，根据请求提供平台兼容性信息和/或批准用于迁移的平台 到位操作，将平台模块部署到现场硬件迁移，在迁移到位操作期间提供用户会话支持，和/或执行安全操作。

公开(公告)号：US20160321107A1

公开(公告)日：2016-11-03

申请号：US15104125

申请日：2014-02-12

Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLC

Inventor： EZEKIEL KRUGLICK

IPC: G06F9/50 ,  G06F9/48

CPC classification number: G06F9/50 ,  G06F9/48 ,  G06F12/0862 ,  G06F2212/1024 ,  G06F2212/6026

Abstract: Technologies are generally described for systems, devices and methods effective to select program instructions for a hardware finite automaton on a multi-core processor that includes two or more cores. A hardware finite automata manager may identify executable instructions associated with a particular one of the cores of the multi-core processor. The hardware finite automata manager may determine that the hardware finite automaton is available to be used. The hardware finite automata manager, in response to the determination that the hardware finite automaton is available, may select at least one program instruction based on the executable instructions. The at least one program instruction may be configured to modify the hardware finite automaton to pre-fetch data. The hardware finite automaton manager may transmit the at least one program instruction to the hardware finite automaton.

Abstract translation: 技术通常描述用于在包括两个或多个核心的多核处理器上选择用于硬件有限自动机的程序指令的系统，设备和方法。 硬件有限自动机管理器可以识别与多核处理器的特定核心之间相关联的可执行指令。 硬件有限自动机管理器可以确定硬件有限自动机是可用的。 硬件有限自动机管理器响应于确定硬件有限自动机可用，可以基于可执行指令来选择至少一个程序指令。 所述至少一个程序指令可被配置为修改硬件有限自动机以预取数据。 硬件有限自动机管理器可以将至少一个程序指令发送到硬件有限自动机。

公开(公告)号：US20160070599A1

公开(公告)日：2016-03-10

申请号：US14479945

申请日：2014-09-08

Applicant: Empire Technology Development LLC

Inventor： EZEKIEL KRUGLICK

IPC: G06F9/50 ,  G06F9/46 ,  G06F9/455

CPC classification number: G06F9/5027 ,  G06F9/461 ,  G06F9/50 ,  G06F9/5038 ,  G06F9/5044 ,  G06F9/505 ,  G06F2209/501

Abstract: Technologies are generally described for systems, devices and methods effective to execute a first computing task by a processor of a data center. In some examples, the first computing task may be executed using an instruction set extension. Execution of the first computing task using the instruction set extension may require a first number of clock cycles. In other examples, execution of the first computing task without using the instruction set extension may require a second number of clock cycles. In some examples, a savings value may be determined. The savings value may represent a difference between the first number of clock cycles and the second number of clock cycles. An amount of processing time may be allocated on the processor to a second computing task. The amount of processing time may be based on the savings value. The second computing task may be different from the first computing task.

Abstract translation: 一般来说，对于由数据中心的处理器执行第一计算任务有效的系统，设备和方法来描述技术。 在一些示例中，可以使用指令集扩展来执行第一计算任务。 使用指令集扩展执行第一计算任务可能需要第一数量的时钟周期。 在其他示例中，在不使用指令集扩展的情况下执行第一计算任务可能需要第二数量的时钟周期。 在一些示例中，可以确定储蓄值。 节省值可以表示第一数量的时钟周期与第二数量的时钟周期之间的差异。 可以在处理器上将处理时间量分配给第二计算任务。 处理时间的数量可以基于储蓄值。 第二计算任务可能与第一计算任务不同。

公开(公告)号：US20160041836A1

公开(公告)日：2016-02-11

申请号：US14887902

申请日：2015-10-20

Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLC

Inventor： EZEKIEL KRUGLICK

IPC: G06F9/455 ,  G06F9/48

CPC classification number: G06F9/45533 ,  G06F1/26 ,  G06F9/455 ,  G06F9/48 ,  G06F9/4893 ,  G06F11/30 ,  G06F11/3062 ,  G06F2201/815 ,  Y02D10/24 ,  Y02D10/26 ,  Y02D10/28

Abstract: Technologies are generally described for systems, devices and methods effective to schedule access to a core. In some examples, a first differential voltage frequency scaling (DVFS) value of a first virtual machine may be received by a virtual machine manager. A second DVFS value of a second virtual machine may be received by the virtual machine manager. A third DVFS value of a third virtual machine may be received by the virtual machine manager. The third DVFS value may be substantially the same as the first DVFS value and different from the second DVFS value. A dispatch cycle may be generated to execute the first, second and third virtual machines on the core. After execution of the first virtual machine, the dispatch cycle may require execution of the third virtual machine before execution of the second virtual machine.

公开(公告)号：US20150258437A1

公开(公告)日：2015-09-17

申请号：US14728645

申请日：2015-06-02

Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLC

Inventor： EZEKIEL KRUGLICK

IPC: A63F13/35 ,  A63F13/795

CPC classification number: A63F13/35 ,  A63F13/00 ,  A63F13/33 ,  A63F13/47 ,  A63F13/60 ,  A63F13/63 ,  A63F13/795

Abstract: Technologies related to cache-influenced video games are generally described. In some examples, the content of video game outputs as experienced by players of a video game may be adaptively modified to make more effective use of digital assets that are loaded in a computing system cache. Cache-influenced video games may increase cache use by increasing use, within a video game, of digital assets in a cache relative to assets not in the cache, e.g., assets that are on disk or in database storage. Cached digital assets can be retrieved more efficiently than assets stored elsewhere, and therefore video game performance may be improved.

Abstract translation: 通常描述与缓存影响的视频游戏相关的技术。 在一些示例中，可以自适应地修改视频游戏的玩家体验的视频游戏输出的内容，以便更有效地使用加载在计算系统高速缓存中的数字资产。 缓存影响的视频游戏可以通过在视频游戏中增加缓存中相对于不在高速缓存中的资产的数字资产（例如，在磁盘上或在数据库存储中的资产）来增加高速缓存的使用。 可以比存储在其他地方的资产更有效地检索缓存的数字资产，因此视频游戏性能可能会得到改善。

公开(公告)号：US20170200318A1

公开(公告)日：2017-07-13

申请号：US15470073

申请日：2017-03-27

Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLC

Inventor： EZEKIEL KRUGLICK

IPC: G06T19/00 ,  G06T11/60 ,  G09G5/00 ,  G02B27/01

CPC classification number: G06T19/006 ,  G02B27/017 ,  G06T11/00 ,  G06T11/60 ,  G06T2210/22 ,  G09G5/00

Abstract: Technologies are described for display of a merged image on a display. A processor may receive first data that relates to a first image of a real object and second data that relates to a second image of a virtual object. The second image, if displayed, may overlap, in an overlap region, at least part of the first image if the first image were displayed. The processor may identify an overlap part in the first data that corresponds to the overlap region, clip the overlap part from the first data to produce clipped data, and blur the clipped data to produce blurred data. The processor may subtract the clipped data from the blurred data to produce an additive blur component, add the additive blur component to the second data to produce merged data, and generate the merged image to be displayed on the display based on the merged data.

公开(公告)号：US20170024893A1

公开(公告)日：2017-01-26

申请号：US15286222

申请日：2016-10-05

Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLC

Inventor： EZEKIEL KRUGLICK

IPC: G06T7/00 ,  G06F3/01

CPC classification number: G06F3/013 ,  G02B27/0093 ,  G02B27/017 ,  G02B27/0172 ,  G02B2027/0138 ,  G02B2027/014 ,  G02B2027/0178 ,  G02B2027/0187 ,  G06K9/00604 ,  G06K9/00671 ,  G06K9/4642 ,  G06K2209/21 ,  G06T7/74 ,  G06T2207/30201

Abstract: Technologies related to scene analysis for improved eye tracking are generally described. In some examples, detected gaze targets may be derived from gaze direction information from an eye-facing sensor. Detected gaze target positions and/or motion may be improved by capturing and analyzing digital scene information from a scene visible by the eye. Digital scene information captured by a digital camera may be analyzed to identify potential gaze targets, such as stationary gaze targets, moving gaze targets, and/or accelerating gaze targets. Detected gaze targets may be modified to positions of selected gaze targets.

Abstract translation: 通常描述与用于改善眼睛跟踪的场景分析相关的技术。 在一些示例中，检测到的注视目标可以从来自眼睛的传感器的注视方向信息导出。 可以通过从眼睛可见的场景中捕获和分析数字场景信息来改善检测目标位置和/或运动。 可以分析由数字照相机拍摄的数字场景信息，以识别潜在的凝视目标，例如固定凝视目标，移动目视目标和/或加速凝视目标。 检测到的目标靶可能被修改为所选注视目标的位置。

公开(公告)号：US20160210164A1

公开(公告)日：2016-07-21

申请号：US14351070

申请日：2013-07-16

Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLC

Inventor： EZEKIEL KRUGLICK

IPC: G06F9/455

CPC classification number: G06F9/45558 ,  G06F9/45533 ,  G06F2009/4557

Abstract: Technologies are generally described for systems, devices and methods effective to execute virtual machines on a core. In some examples, a processor may execute a first virtual machine on the core and receive a first request for an identification of the core by the first virtual machine. The processor may generate a first identifier associated with the core and associate the first identifier with the first virtual machine. The processor may report the first identifier to the first virtual machine. The processor may further execute a second virtual machine on the core and receive a second request for an identification of the core by the second virtual machine. The processor may generate a second identifier associated with the core that may be different from the first identifier. The processor may associate the second identifier with the second virtual machine and report the second identifier to the second virtual machine.

Abstract translation: 技术通常描述用于在核心上执行虚拟机的系统，设备和方法。 在一些示例中，处理器可以在核心上执行第一虚拟机并且接收第一虚拟机识别核的第一请求。 处理器可以生成与核心相关联的第一标识符并将第一标识符与第一虚拟机相关联。 处理器可以将第一标识符报告给第一虚拟机。 处理器可以进一步在核心上执行第二虚拟机，并且接收由第二虚拟机识别核心的第二请求。 处理器可以生成与核心相关联的可能与第一标识符不同的第二标识符。 处理器可以将第二标识符与第二虚拟机相关联，并将第二标识符报告给第二虚拟机。