公开(公告)号：US4916501A

公开(公告)日：1990-04-10

申请号：US368253

申请日：1989-06-19

Applicant: Yves Thenoz ,  Francois Roy

Inventor： Yves Thenoz ,  Francois Roy

IPC: H04N5/335 ,  H01L27/146 ,  H01L27/148

CPC classification number: H01L27/14887

Abstract: The disclosed photosensitive matrix comprises, in a standard way, a P type semiconductor substrate, an N type channel layer separated by narrow insulating zones into a plurality of columns and, on a thin layer of insulating oxide placed on the channel layer, a network of transfer gates extending perpendicularly to the insulating zones, dividing the columns into a large number of "pixels". According to the invention, the matrix has, between the substrate and the channel layer, a weakly doped P type base layer, in which are buried anti-blooming diodes consisting of a narrow, strongly doped N type drain extending in a direction parallel to the insulation zones. Beneath the drain, there is a strongly doped, P type protective screen. The arrangement gives an optical aperture of the matrix close to unity and a spectral response that is improved towards the red side of the spectrum owing to the thickness of the base layer.

Abstract translation: 所公开的光敏矩阵以标准方式包括P型半导体衬底，由窄绝缘区分隔成多个列的N型沟道层，并且在放置在沟道层上的绝缘氧化物薄层上包括网络 传输门垂直于绝缘区延伸，将列分成大量的“像素”。 根据本发明，矩阵在衬底和沟道层之间具有弱掺杂的P型基极层，其中是由平行于...的方向延伸的窄的强掺杂的N型漏极组成的掩埋防喷射二极管 绝缘区。 在漏极之下，有一个强掺杂的P型保护屏。 该布置使得矩阵的光学孔径接近于单位，并且由于基底层的厚度，光谱响应被改进到光谱的红色侧。

公开(公告)号：USD1007875S1

公开(公告)日：2023-12-19

申请号：US29804494

申请日：2021-08-20

Applicant: Francois Roy

Designer： Francois Roy

Abstract: FIG. 1 is a perspective view of a stretcher bar frame showing my new design;
FIG. 2 is an enlarged front perspective view thereof;
FIG. 3 is a rear perspective view of FIG. 2;
FIG. 4 is a front elevational view of FIG. 2;
FIG. 5 is a right-side elevational view of FIG. 2;
FIG. 6 is a top plan view of FIG. 2;
FIG. 7 is a bottom plan view of FIG. 2;
FIG. 8 is an enlarged left-side elevational view of FIG. 2; and,
FIG. 9 is an enlarged right-side elevational view of FIG. 2.
The broken lines in FIG. 1 depict environment and form no part of the claimed design. The dash-dot lines in the figures depict boundary lines of the design. The additional broken lines depict portions of the stretcher bar frame, which form no part of the claimed design.

公开(公告)号：USD796943S1

公开(公告)日：2017-09-12

申请号：US29559309

申请日：2016-03-26

Applicant: Francois Roy

Designer： Francois Roy

公开(公告)号：US20080185585A1

公开(公告)日：2008-08-07

申请号：US11961202

申请日：2007-12-20

Applicant: Francois Roy

Inventor： Francois Roy

IPC: H01L31/02 ,  H01L23/58 ,  H01L31/18

CPC classification number: H01L23/53223 ,  H01L23/53238 ,  H01L24/05 ,  H01L27/14636 ,  H01L27/14643 ,  H01L2224/02166 ,  H01L2224/05624 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/05042 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A microelectronic device may include a substrate, a plurality of components on the substrate, an insulating layer adjacent the substrate, and a plurality of metallic interconnection levels within the insulating layer and for the plurality of components. The plurality of metallic interconnection levels may include at least one given metallic level including a plurality of conductive lines of a first metallic material, and at least one other metallic level adjacent the at least one given metallic level. The at least one other metallic level may include at least one conductive zone of the first metallic material and coupled to at least one of the plurality of conductive lines of the at least one given metallic level, and at least one other conductive zone of a second metallic material and coupled to at least one other of the plurality of conductive lines of the at least one given metallic level.

Abstract translation: 微电子器件可以包括衬底，衬底上的多个部件，与衬底相邻的绝缘层，以及绝缘层和多个部件内的多个金属互连级别。 多个金属互连级别可以包括至少一个给定的金属级，包括第一金属材料的多条导电线，以及与至少一个给定金属层相邻的至少一个其它金属级。 所述至少一个其它金属层可以包括所述第一金属材料的至少一个导电区并且耦合到所述至少一个给定金属水平的所述多个导电线中的至少一个，以及第二金属层的至少一个其它导电区 金属材料并且耦合到至少一个给定金属水平的多个导电线中的至少另一个。

公开(公告)号：US20080017893A1

公开(公告)日：2008-01-24

申请号：US11824287

申请日：2007-06-29

Applicant: Yvon Cazaux ,  Francois Roy

Inventor： Yvon Cazaux ,  Francois Roy

IPC: H01L27/148 ,  H01L29/768

CPC classification number: H01L27/14689 ,  H01L27/14609 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/1464 ,  H01L27/14643

Abstract: An image sensor including a P-type doped layer of a semiconductor material including first and second opposite surfaces; and at least one photodiode formed in the layer on the side of the first surface and intended to be lit through the second surface. The dopant concentration in the layer increases from the first surface to the second surface.

Abstract translation: 包括包括第一和第二相对表面的半导体材料的P型掺杂层的图像传感器; 以及至少一个光电二极管，形成在该第一表面一侧的层中，并且旨在通过第二表面点亮。 层中的掺杂剂浓度从第一表面增加到第二表面。

公开(公告)号：US20060258042A1

公开(公告)日：2006-11-16

申请号：US11432678

申请日：2006-05-10

Applicant: Francois Roy ,  Arnaud Tournier

Inventor： Francois Roy ,  Arnaud Tournier

IPC: H01L21/00 ,  H01L33/00

CPC classification number: H01L27/14609 ,  H01L27/1443

Abstract: An integrated circuit includes at least one photodiode of the floating substrate type which is associated with a read transistor. The photodiode is formed from a buried layer lying beneath the floating substrate and an upper layer lying on the floating substrate. The upper layer incorporates the source and drain regions of the read transistor. The source and drain regions are produced on either side of the gate of the read transistor. An isolating trench is located alongside the source region and extends from the upper surface of the upper layer down to below the buried layer, so as to isolate the source region from said buried layer.

Abstract translation: 集成电路包括与读取晶体管相关联的浮置衬底类型的至少一个光电二极管。 光电二极管由位于浮置衬底之下的掩埋层和位于浮动衬底上的上层形成。 上层结合读取晶体管的源极和漏极区域。 源极和漏极区域在读取晶体管的栅极的任一侧上产生。 隔离沟槽位于源极区旁边，并从上层的上表面向下延伸到掩埋层的下方，从而将源极区域与掩埋层隔离。

公开(公告)号：US07078752B2

公开(公告)日：2006-07-18

申请号：US10883636

申请日：2004-07-01

Applicant: Francois Roy

Inventor： Francois Roy

IPC: H01L31/113

CPC classification number: H04N5/374 ,  H04N5/3597

Abstract: A method of controlling a MOS-type photodetector includes transferring electrical charge between a photodiode (12) and a sensing node (3) via a transfer transistor. The electrical potential of the sensing node (3) takes an extreme value when a maximum quantity of electrical charge is stored on the sensing node (3). During the electrical charge transfer, an electrical potential is applied to the gate electrode of a transfer transistor in such a way that the electrical potential of the channel (2) of the transfer transistor is brought to a value equal to the extreme value of the electrical potential of the sensing node (3) multiplied by a number greater than or equal to unity.

Abstract translation: 控制MOS型光电检测器的方法包括经由传输晶体管在光电二极管（12）和感测节点（3）之间转移电荷。 当感测节点（3）上存储最大电量时，感测节点（3）的电位为极值。 在电荷转移期间，将电位施加到转移晶体管的栅电极，使得转移晶体管的沟道（2）的电位达到等于电的极值的值 感测节点（3）的电位乘以大于或等于1的数字。

公开(公告)号：US20050116270A1

公开(公告)日：2005-06-02

申请号：US10498731

申请日：2002-12-12

Applicant: Francois Roy

Inventor： Francois Roy

IPC: H01L27/146 ,  H01L31/10 ,  H04N5/335 ,  H01L31/062

CPC classification number: H01L27/14654

Abstract: The photodiode comprises an upper pn junction (D1) formed between an upper layer and an intermediate layer supported by one portion of a semiconductor substrate. A lower junction is formed between the intermediate layer and the substrate portion. The forward bias voltage of the upper junction (D1) is lower than the forward bias voltage of the lower junction (D2). The charges are permitted to be stored in the photodiode until the said upper junction is forward-biased so as to favour (A1) the recombination of the carriers coming from the intermediate layer with the carriers of the upper layer.

Abstract translation: 光电二极管包括形成在上层和由半导体衬底的一部分支撑的中间层之间的上pn结（D 1）。 在中间层和基板部分之间形成下部结。 上部结（D 1）的正向偏置电压低于下部结（D 2）的正向偏置电压。 允许电荷存储在光电二极管中，直到所述上结为正向偏置，以便有利于（A 1）来自中间层的载流子与上层载体的复合。

公开(公告)号：USD930369S1

公开(公告)日：2021-09-14

申请号：US29738876

申请日：2020-06-19

Applicant: Francois Roy

Designer： Francois Roy

公开(公告)号：US10421315B2

公开(公告)日：2019-09-24

申请号：US15796783

申请日：2017-10-28

Applicant: Francois Roy

Inventor： Francois Roy

IPC: B44D3/18 ,  B25B5/00 ,  D05C1/02

Abstract: The invention relates to a device for tensioning a canvas on a frame, which is for assembling two bars the ends of which comprise a groove. The device comprises: an optional sheath intended to be immobilized in a groove; a spacer comprising a central portion from which extend two lateral portions each having a bearing face coming to abut against the bottom of the sheath; a tensioner comprising a central portion from which extend securing means for securing the tensioner to the bars, via the sheath; a connecting member for connecting the spacer to the tensioner, and means for bringing the spacer closer to the tensioner, wherein the spacer being brought closer to the tensioner will cause each bar to translate along its longitudinal axis so as to space the bars apart from each other while keeping them perpendicular to each other.