公开(公告)号：US20240145382A1

公开(公告)日：2024-05-02

申请号：US18051037

申请日：2022-10-31

Applicant: GlobalFoundries U.S. Inc.

Inventor： Ravi P. Srivastava ,  Jagar Singh

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/00 ,  H01L23/48 ,  H01L49/02

CPC classification number: H01L23/5227 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/08 ,  H01L24/80 ,  H01L28/10 ,  H01L2224/08146 ,  H01L2224/80895 ,  H01L2224/80896

Abstract: Disclosed is a structure and a method of forming the structure. The structure includes first and second semiconductor substrates with adjacent surfaces (e.g., bonded surfaces), a first spiral-shape metallic feature in the first semiconductor substrate, and a second spiral-shaped metallic feature in the second semiconductor substrate. The second spiral-shaped metallic feature is aligned above and electrically connected to the first spiral-shaped metallic feature. In some embodiments, the second spiral-shaped metallic feature is stacked on and immediately adjacent to the first spiral-shaped metallic feature at the bonded surfaces, thereby forming a relatively large inductor with high Qdc in a relatively small area. In other embodiments, the first and second spiral-shaped metallic features are discrete inductors located on opposite sides of the semiconductor substrates from the bonded surfaces but electrically connected in parallel (e.g., using stacked TSVs), effectively forming a relatively large inductor with a high Qdc in a relatively small area.

公开(公告)号：US20240136400A1

公开(公告)日：2024-04-25

申请号：US18405621

申请日：2024-01-05

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Alexander Derrickson ,  Vibhor Jain ,  Judson R. Holt ,  Jagar Singh ,  Mankyu Yang

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/10 ,  H01L29/417 ,  H01L29/735 ,  H01L29/737

CPC classification number: H01L29/0821 ,  H01L29/0649 ,  H01L29/0808 ,  H01L29/0817 ,  H01L29/1008 ,  H01L29/41708 ,  H01L29/735 ,  H01L29/737

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor with gated collector and methods of manufacture. The structure includes: an extrinsic base region vertically over a semiconductor substrate and comprising asymmetrical sidewall spacers on opposing sidewalls of the extrinsic base region; a collector region on the semiconductor substrate and separated from the extrinsic base region by at least a first spacer of the asymmetrical sidewall spacers; and an emitter region on the semiconductor substrate and separated from the extrinsic base region by a second spacer of the asymmetrical sidewall spacers.

公开(公告)号：US20240021713A1

公开(公告)日：2024-01-18

申请号：US18373598

申请日：2023-09-27

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Haiting Wang ,  Alexander Derrickson ,  Jagar Singh ,  Vibhor Jain ,  Andreas Knorr ,  Alexander Martin ,  Judson R. Holt ,  Zhenyu Hu

IPC: H01L29/735 ,  H01L29/66 ,  H01L29/737 ,  H01L29/08 ,  H01L29/417

CPC classification number: H01L29/735 ,  H01L29/6625 ,  H01L29/737 ,  H01L29/0808 ,  H01L29/41708 ,  H01L29/0821

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. A structure includes: an intrinsic base comprising semiconductor material in a channel region of a semiconductor substrate; an extrinsic base vertically above the intrinsic base; a raised collector region on the semiconductor substrate and laterally connected to the intrinsic base; and a raised emitter region on the semiconductor substate and laterally connected to the intrinsic base.

公开(公告)号：US11804542B2

公开(公告)日：2023-10-31

申请号：US17557176

申请日：2021-12-21

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Alexander M. Derrickson ,  Arkadiusz Malinowski ,  Jagar Singh ,  Mankyu Yang ,  Judson R. Holt

IPC: H01L29/737 ,  H01L29/165 ,  H01L29/66 ,  H01L29/10 ,  H01L29/08

CPC classification number: H01L29/7371 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/165 ,  H01L29/66242

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to annular bipolar transistors and methods of manufacture. The structure includes: a substate material; a collector region parallel to and above the substrate material; an intrinsic base region surrounding the collector region; an emitter region above the intrinsic base region; and an extrinsic base region contacting the intrinsic base region.

公开(公告)号：US11769806B2

公开(公告)日：2023-09-26

申请号：US17525236

申请日：2021-11-12

Applicant: GlobalFoundries U.S. Inc.

Inventor： Hong Yu ,  Jagar Singh

IPC: H01L29/417 ,  H01L29/66 ,  H01L29/40 ,  H01L29/737 ,  H01L29/735

CPC classification number: H01L29/41708 ,  H01L29/401 ,  H01L29/66242 ,  H01L29/735 ,  H01L29/737

Abstract: Structures for a bipolar junction transistor and methods of forming a structure for a bipolar junction transistor. The structure includes a first terminal having a first raised semiconductor layer having a top surface and a side surface, a second terminal having a second raised semiconductor layer, and a base layer positioned in a lateral direction between the first raised semiconductor layer of the first terminal and the second raised semiconductor layer of the second terminal. The structure further includes a contact positioned to overlap with the top surface and the side surface of the first raised semiconductor layer.

公开(公告)号：US20230075949A1

公开(公告)日：2023-03-09

申请号：US17550835

申请日：2021-12-14

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Jagar Singh ,  Alexander M. Derrickson ,  Alexander Martin

IPC: H01L29/735 ,  H01L29/423 ,  H01L29/45 ,  H01L29/10 ,  H01L29/08

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. The structure includes: an extrinsic base region composed of semiconductor material; an emitter region on a first side of the extrinsic base region; a collector region on a second side of the extrinsic base region; and an extrinsic base contact wrapping around the semiconductor material of the extrinsic base region.

公开(公告)号：US20230063900A1

公开(公告)日：2023-03-02

申请号：US17524438

申请日：2021-11-11

Applicant: GlobalFoundries U.S. Inc.

Inventor： Man Gu ,  Jagar Singh ,  Haiting Wang ,  Jeffrey Johnson

IPC: H01L29/10 ,  H01L29/08 ,  H01L29/66 ,  H01L29/735 ,  H01L29/737 ,  H01L29/06

Abstract: Structures for a bipolar junction transistor and methods of forming a structure for a bipolar junction transistor. The structure includes a collector having a raised portion, an emitter having a raised portion, and a base laterally arranged between the raised portion of the emitter and the raised portion of the collector. The base includes an intrinsic base layer and an extrinsic base layer stacked with the intrinsic base layer. The structure further includes a stress liner positioned to overlap with the raised portion of the collector, the raised portion of the emitter, and the extrinsic base layer.

公开(公告)号：US20230062747A1

公开(公告)日：2023-03-02

申请号：US17529002

申请日：2021-11-17

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Man Gu ,  Haiting Wang ,  Jagar Singh

IPC: H01L29/10 ,  H01L29/423 ,  H01L29/735 ,  H01L29/66

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. The structure includes a lateral bipolar junction transistor including an extrinsic base region and a bilayer dielectric spacer on sidewalls of the extrinsic base region, and a p-n junction positioned under the bilayer dielectric spacer between the extrinsic base region and at least an emitter region.

公开(公告)号：US20230061219A1

公开(公告)日：2023-03-02

申请号：US17509384

申请日：2021-10-25

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Haiting Wang ,  Alexander Derrickson ,  Jagar Singh ,  Vibhor Jain ,  Andreas Knorr ,  Alexander Martin ,  Judson R. Holt ,  Zhenyu Hu

IPC: H01L29/735 ,  H01L29/66 ,  H01L29/08 ,  H01L29/417 ,  H01L29/737

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. A structure includes: an intrinsic base comprising semiconductor material in a channel region of a semiconductor substrate; an extrinsic base vertically above the intrinsic base; a raised collector region on the semiconductor substrate and laterally connected to the intrinsic base; and a raised emitter region on the semiconductor substate and laterally connected to the intrinsic base.

公开(公告)号：US11588056B2

公开(公告)日：2023-02-21

申请号：US16992440

申请日：2020-08-13

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Mark D. Levy ,  Siva P. Adusumilli ,  Jagar Singh

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/66

Abstract: A structure includes a semiconductor-on-insulator (SOI) substrate including a semiconductor substrate, a buried insulator layer over the semiconductor substrate, and an SOI layer over the buried insulator layer. At least one polycrystalline active region fill shape is in the SOI layer. A polycrystalline isolation region may be in the semiconductor substrate under the buried insulator layer. The at least one polycrystalline active region fill shape is laterally aligned over the polycrystalline isolation region, where provided. Where provided, the polycrystalline isolation region may extend to different depths in the semiconductor substrate.