中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

23 records (took 0.014 seconds)

    FIELD EFFECT TRANSISTOR WITH ASYMMETRIC GATE STRUCTURE AND METHOD
    11.
    发明申请
    FIELD EFFECT TRANSISTOR WITH ASYMMETRIC GATE STRUCTURE AND METHOD 有权

    公开(公告)号：US20220059691A1

    公开(公告)日：2022-02-24

    申请号：US16996010

    申请日：2020-08-18

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Yanping Shen ,  Haiting Wang ,  Zhiqing Li

    IPC: H01L29/78 ,  H01L29/66 ,  H01L29/08

    Abstract: Disclosed is a lateral double-diffused metal oxide semiconductor field effect transistor (LDMOSFET) with a replacement metal gate (RMG) structure that includes a first section, which traverses a semiconductor body at a channel region in a first-type well, and a second section, which is adjacent to the first section and which traverses the semiconductor body at a drain drift region in a second-type well. The RMG structure includes, in both sections, a first-type work function layer and a second-type work function layer on the first-type work function layer. However, the thickness of the first-type work function layer in the first section is greater than the thickness in the second section such that the RMG structure is asymmetric. Thus, threshold voltage (Vt) at the first section is greater than Vt at the second section and the LDMOSFET has a relatively high breakdown voltage (BV). Also disclosed are methods for forming the LDMOSFET.

    MEMORY DEVICE AND METHODS OF MAKING SUCH A MEMORY DEVICE
    12.
    发明申请
    MEMORY DEVICE AND METHODS OF MAKING SUCH A MEMORY DEVICE 有权

    公开(公告)号：US20210305495A1

    公开(公告)日：2021-09-30

    申请号：US16836434

    申请日：2020-03-31

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Yanping Shen ,  Haiting Wang ,  Sipeng Gu

    IPC: H01L43/02 ,  H01L43/12 ,  G11C11/16 ,  H01L27/22

    Abstract: One illustrative memory cell disclosed herein includes at least one layer of insulating material having a first opening and an internal sidewall spacer positioned within the first opening, wherein the internal sidewall spacer includes a spacer opening. The memory cell also includes a bottom electrode positioned within the spacer opening, a memory state material positioned above an upper surface of the bottom electrode and above an upper surface of the internal sidewall spacer, and a top electrode positioned above the memory state material.

    Semiconductor devices having late-formed isolation structures
    13.
    发明授权
    Semiconductor devices having late-formed isolation structures 有权

    公开(公告)号：US11908857B2

    公开(公告)日：2024-02-20

    申请号：US16901417

    申请日：2020-06-15

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Yanping Shen ,  Haiting Wang ,  Sipeng Gu

    IPC: H01L27/088 ,  H01L21/8234 ,  H01L21/8238

    CPC classification number: H01L27/0886 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823481 ,  H01L21/823878

    Abstract: Structures for a semiconductor device that include dielectric isolation and methods of forming a structure for a semiconductor device that includes dielectric isolation. A semiconductor body includes a cavity, first and second gate structures extending over the semiconductor body, and a semiconductor layer including first and second sections on the semiconductor body. The first section of the semiconductor layer is laterally positioned between the cavity and the first gate structure, and the second section on the semiconductor layer is laterally positioned between the cavity and the second gate structure. An isolation structure is laterally positioned between the first and second sections of the semiconductor layer. The isolation structure includes a dielectric layer and a sidewall spacer having first and second sections. The dielectric layer includes a first portion in the cavity and a second portion between the first and second sections of the sidewall spacer.

    Active and dummy fin structures
    14.
    发明授权
    Active and dummy fin structures 有权

    公开(公告)号：US11264504B2

    公开(公告)日：2022-03-01

    申请号：US16751779

    申请日：2020-01-24

    Applicant: GLOBALFOUNDRIES U.S. INC.

    Inventor： Yanping Shen ,  Haiting Wang ,  Hong Yu

    IPC: H01L29/78 ,  H01L29/16 ,  H01L29/423

    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a scheme of active and dummy fin structures and methods of manufacture. The structure includes: an active fin structure; at least one dummy fin structure running along at least one side of the active fin structure along its length; a fin cut separating the at least one dummy fin structure along its longitudinal axes; and a gate structure extending over the active fin structure and the fin cut.

    SEMICONDUCTOR DEVICES HAVING LATE-FORMED ISOLATION STRUCTURES
    20.
    发明申请
    SEMICONDUCTOR DEVICES HAVING LATE-FORMED ISOLATION STRUCTURES 有权

    公开(公告)号：US20210391323A1

    公开(公告)日：2021-12-16

    申请号：US16901417

    申请日：2020-06-15

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Yanping Shen ,  Haiting Wang ,  Sipeng Gu

    IPC: H01L27/088 ,  H01L21/8234

    Abstract: Structures for a semiconductor device that include dielectric isolation and methods of forming a structure for a semiconductor device that includes dielectric isolation. A semiconductor body includes a cavity, first and second gate structures extending over the semiconductor body, and a semiconductor layer including first and second sections on the semiconductor body. The first section of the semiconductor layer is laterally positioned between the cavity and the first gate structure, and the second section on the semiconductor layer is laterally positioned between the cavity and the second gate structure. An isolation structure is laterally positioned between the first and second sections of the semiconductor layer. The isolation structure includes a dielectric layer and a sidewall spacer having first and second sections. The dielectric layer includes a first portion in the cavity and a second portion between the first and second sections of the sidewall spacer.

Patent Agency Ranking