Abstract:
An apparatus is described that includes a first semiconductor chip having a first pixel array. The first pixel array has visible light sensitive pixels. The apparatus includes a second semiconductor chip having a second pixel array. The first semiconductor chip is stacked on the second semiconductor chip such that the second pixel array resides beneath the first pixel array. The second pixel array has IR light sensitive pixels for time-of-flight based depth detection.
Abstract:
An apparatus is described that includes an image sensor having timing and control circuitry and threshold circuitry. The timing and control circuitry is to generate signals to cause multiple transfers of charge from a photo-diode to a storage capacitor within a pixel cell during an image capture sequence. The threshold circuitry is to track the storage capacitor's voltage over the course of the multiple transfers and recognize when the storage capacitor's voltage reaches a threshold.
Abstract:
An image sensor is described. The image sensor includes a pixel array having a unit cell that includes visible light photodiodes and an infra-red photodiode. The visible light photodiodes and the infra-red photodiode are coupled to a particular column of the pixel array. The unit cell has a first capacitor coupled to the visible light photodiodes to store charge from each of the visible light photodiodes. The unit cell having a readout circuit to provide the first capacitor's voltage on the particular column. The unit cell having a second capacitor that is coupled to the infra-red photodiode through a transfer gate transistor to receive charge from the infra-red photodiode during a time-of-flight exposure. The unit cell has a back-drain transistor coupled to the infra-red photodiode.
Abstract:
An apparatus is described having an integrated two-dimensional image capture and three-dimensional time-of-flight depth capture system. The integrated two-dimensional image capture and three-dimensional time-of-flight depth capture system includes an illuminator to generate light for the time-of-flight depth capture system. The illuminator includes an array of light sources and a movable lens assembly. The movable lens assembly is to movably direct an emitted beam of the light to one of any of a plurality of locations within the illuminator's field of view to form an illuminated region of interest within the illuminator's field of view. The illuminated region of interest has a size that is smaller than the illuminator's field of view.
Abstract:
An apparatus is described that includes a first semiconductor chip having a first pixel array. The first pixel array has visible light sensitive pixels. The apparatus includes a second semiconductor chip having a second pixel array. The first semiconductor chip is stacked on the second semiconductor chip such that the second pixel array resides beneath the first pixel array. The second pixel array has IR light sensitive pixels for time-of-flight based depth detection.
Abstract:
An apparatus is described that includes an integrated two-dimensional image capture and three-dimensional time-of-flight depth capture system. The three-dimensional time-of-flight depth capture system includes an illuminator to generate light. The illuminator includes arrays of light sources. Each of the arrays is dedicated to a particular different partition within a partitioned field of view of the illuminator.
Abstract:
An apparatus is described that includes a first semiconductor chip having a first pixel array. The first pixel array has visible light sensitive pixels. The apparatus includes a second semiconductor chip having a second pixel array. The first semiconductor chip is stacked on the second semiconductor chip such that the second pixel array resides beneath the first pixel array. The second pixel array has IR light sensitive pixels for time-of-flight based depth detection.
Abstract:
An apparatus is described that includes an image sensor having timing and control circuitry and threshold circuitry. The timing and control circuitry is to generate signals to cause multiple transfers of charge from a photo-diode to a storage capacitor within a pixel cell during an image capture sequence. The threshold circuitry is to track the storage capacitor's voltage over the course of the multiple transfers and recognize when the storage capacitor's voltage reaches a threshold.
Abstract:
An image sensor is described having a pixel cell unit. The pixel cell unit has first, second and third transfer gate transistor gates on a semiconductor surface respectively coupled between first, second and third visible light photodiode regions and a first capacitance region. The pixel cell unit has a fourth transfer gate transistor gate on the semiconductor surface coupled between a first infrared photodiode region and a second capacitance region.
Abstract:
An apparatus is described. The apparatus includes a smart image sensor having a memory and a processor that are locally integrated with an image sensor. The memory is to store first program code to be executed by the processor. The memory is coupled to the image sensor and the processor. The memory is to store second program code to be executed by the processor. The first program code is to cause the smart image sensor to perform an analysis on one or more images captured by the image sensor. The analysis identifies a region of interest within the one or more images with machine learning from previously captured images. The second program code is to cause the smart image sensor to change an image sensing and/or optical parameter in response to the analysis of the one or more images performed by the execution of the first program code. Alternatively or in combination, the memory is to store third program code to be executed by the processor and fourth program code to be executed by the processor. The third program code is to store multiple images captured by the image sensor in the memory. The fourth program code is to merge the multiple images in the memory.