Signal processing circuit with voltage clamped input
    11.
    发明授权
    Signal processing circuit with voltage clamped input 失效
    具有电压钳位输入的信号处理电路

    公开(公告)号:US4590394A

    公开(公告)日:1986-05-20

    申请号:US589269

    申请日:1984-03-13

    申请人: Gary L. Pace

    发明人: Gary L. Pace

    IPC分类号: H03G11/04 H03G11/06 H03K5/08

    CPC分类号: H03G11/06 H03G11/04

    摘要: A signal processing circuit with enhanced response time includes a data limiter circuit having an input and an input capacitor having one terminal coupled to the input. A first selectively actuable voltage clamping circuit responds to a first comparing circuit and is coupled to the input for preventing the voltage at the input from exceeding a predetermined upper voltage. A second selectively actuable voltage clamping circuit is responsive to a second comparing circuit and is coupled to the input for preventing the voltage at the input from decreasing below a predetermined lower voltage.

    摘要翻译: 具有增强的响应时间的信号处理电路包括具有输入的数据限制器电路和具有耦合到输入的一个端子的输入电容器。 第一可选择性致动的钳位电路响应于第一比较电路并耦合到输入端,用于防止输入端的电压超过预定的上限电压。 第二可选择性致动的钳位电路响应于第二比较电路并耦合到输入端,用于防止输入端的电压降低到低于预定的较低电压。

    Zerox-IF receiver with tracking second local oscillator and demodulator
phase locked loop oscillator
    12.
    发明授权
    Zerox-IF receiver with tracking second local oscillator and demodulator phase locked loop oscillator 失效
    具有跟踪第二本地振荡器和解调器锁相环振荡器的Zerox-IF接收器

    公开(公告)号:US5606731A

    公开(公告)日:1997-02-25

    申请号:US399805

    申请日:1995-03-07

    IPC分类号: H03D3/24 H03J7/04 H04B1/30

    CPC分类号: H03D3/242 H03J7/04 H04B1/30

    摘要: A zero-intermediate frequency receiver circuit (11) for receiving a radio frequency signal detected by an antenna (14). The receiver circuit (10) comprises a second local oscillator circuit (25) and an oscillator circuit (60) of a phase locked loop demodulator (36) which are identical and track each other so as to provide a more accurate reference for processing a demodulated signal. A current reference (39) providing a current reference signal utilized by the second local oscillator circuit (25) and the oscillator circuit (60) of the phase locked loop demodulator (36).

    摘要翻译: 一种用于接收由天线(14)检测的射频信号的零中频接收机电路(11)。 接收机电路(10)包括第二本地振荡器电路(25)和锁相环解调器(36)的振荡器电路(60),它们彼此相同并相互跟踪,以便提供更准确的参考用于处理解调的 信号。 提供由第二本地振荡器电路(25)和锁相环解调器(36)的振荡器电路(60)使用的电流参考信号的电流参考(39)。

    Phase locked loop circuit current mode feedback
    13.
    发明授权
    Phase locked loop circuit current mode feedback 失效
    锁相环电路电流模式反馈

    公开(公告)号:US5604926A

    公开(公告)日:1997-02-18

    申请号:US399784

    申请日:1995-03-07

    摘要: A phase locked loop (PLL) circuit for use as a demodulator and other applications. The PLL circuit (200) comprises a phase detector (210), a transconductance amplifier (212) and a current controlled oscillator (ICO) (214). The phase detector has two signal inputs and two outputs, and detects a phase difference between signals at its inputs. A capacitor C1 is connected to the output of phase detector (210) and develops an output voltage signal vo(t). A transconductance amplifier (212) is coupled to the capacitor C1 and converts the output voltage signal vo(t) to an output current signal. The ICO (214) is coupled to the transconductance amplifier (212) and the second output of the phase detector (210) and generates an output signal having a frequency which is proportional to an input current signal. The output signal of the ICO (214) is coupled to the second signal input of the phase detector (212).

    摘要翻译: 用作解调器和其他应用的锁相环(PLL)电路。 PLL电路(200)包括相位检测器(210),跨导放大器(212)和电流控制振荡器(ICO)(214)。 相位检测器具有两个信号输入和两个输出,并检测其输入信号之间的相位差。 电容器C1连接到相位检测器(210)的输出端并产生输出电压信号vo(t)。 跨导放大器(212)耦合到电容器C1,并将输出电压信号vo(t)转换成输出电流信号。 ICO(214)耦合到跨导放大器(212)和相位检测器(210)的第二输出端,并产生具有与输入电流信号成比例的频率的输出信号。 ICO(214)的输出信号耦合到相位检测器(212)的第二信号输入端。

    Non-contact pager programming system and a pager for use therewith
    14.
    发明授权
    Non-contact pager programming system and a pager for use therewith 失效
    非接触寻呼机编程系统和与其一起使用的寻呼机

    公开(公告)号:US5252964A

    公开(公告)日:1993-10-12

    申请号:US928164

    申请日:1992-08-13

    摘要: A non-contact pager programming system includes a controller (30) which is responsive to command and data signals to generate first signals (34) including command and data words to govern a transmitting circuit (36) to transmit over the air a programming signal (46) digitally modulated in accordance with a reception protocol. The programming system may also include a receiving circuit (42) which is governed by at least one second signal (40) generated by the controller to receive over-the-air signals (52) generated by the pager being programmed in response to the programming signal.

    摘要翻译: 非接触寻呼机编程系统包括控制器(30),其响应于命令和数据信号以产生包括命令和数据字的第一信号(34),以管理发射电路(36),以通过空中传送编程信号( 46)根据接收协议进行数字调制。 编程系统还可以包括由控制器产生的至少一个第二信号(40)控制的接收电路(42),以接收由响应于编程的编程的寻呼机生成的空中信号(52) 信号。

    Low current amplifier with controlled hysteresis
    15.
    发明授权
    Low current amplifier with controlled hysteresis 失效
    低电流放大器具有受控的滞后

    公开(公告)号:US4929910A

    公开(公告)日:1990-05-29

    申请号:US377033

    申请日:1989-07-10

    IPC分类号: H03F1/32 H03F3/45

    CPC分类号: H03F1/3211 H03F3/45089

    摘要: An improved amplifier with controlled hysteresis and an extremely low current drain capable of operating over a sufficiently large input voltage dynamic range is provided. Two circuits comprising a transistor and a diode are coupled between a differential amplifier and two cross-coupled current mirrors for preventing transistor saturation in the current mirrors.

    摘要翻译: 提供了具有受控滞后的改进的放大器和能够在足够大的输入电压动态范围内工作的极低电流漏极。 包括晶体管和二极管的两个电路耦合在差分放大器和两个交叉耦合电流镜之间,以防止电流镜中的晶体管饱和。

    Data limiter having current controlled response time
    16.
    发明授权
    Data limiter having current controlled response time 失效
    数据限制器具有当前受控的响应时间

    公开(公告)号:US4866261A

    公开(公告)日:1989-09-12

    申请号:US246905

    申请日:1988-09-16

    申请人: Gary L. Pace

    发明人: Gary L. Pace

    IPC分类号: H03M1/12

    CPC分类号: H03M1/1295

    摘要: A data limiter in a paging receiver for converting an analog signal to a digital signal, the data limiter having a variable time constant. The data limiter includes an amplifying circuit and an integrating circuit. The amplifying circuit, being responsive to the analog input signal generated from a receiving circuit of the paging receiver, generates a reference signal depending upon a variable bias current input to the amplifying circuit. The integrating circuit, being responsive to the reference signal, generates a comparison signal depending upon a variable gain input. The amplifying circuit responsive to the comparison signal compares the comparison signal to the input signal for generating a digital output signal. A processing circuit of the paging receiver generates a first control signal for modifying the variable bias current input and a second output signal for modifying the variable gain input. Additionally, the processing circuit generates a third control signal being applied to the integrating circuit for effecting a storage of the comparison signal in the integrating circuit.

    摘要翻译: 一种用于将模拟信号转换为数字信号的寻呼机中的数据限制器,数据限制器具有可变的时间常数。 数据限幅器包括放大电路和积分电路。 放大电路响应于从寻呼接收机的接收电路产生的模拟输入信号,根据输入到放大电路的可变偏置电流产生参考信号。 积分电路响应于参考信号,根据可变增益输入产生比较信号。 响应于比较信号的放大电路将比较信号与输入信号进行比较,以产生数字输出信号。 寻呼接收机的处理电路产生用于修改可变偏置电流输入的第一控制信号和用于修改可变增益输入的第二输出信号。 此外,处理电路产生施加到积分电路的第三控制信号,以在积分电路中实现比较信号的存储。

    High current driver providing battery overload protection
    17.
    发明授权
    High current driver providing battery overload protection 失效
    大电流驱动器提供电池过载保护

    公开(公告)号:US5585749A

    公开(公告)日:1996-12-17

    申请号:US363785

    申请日:1994-12-27

    摘要: A high current driver (100) for driving a high current load (110) in an electronic device powered by a battery (112) comprises a voltage reference (104) for generating a reference voltage, and a drive current controller (102, 302) responsive to a drive control signal for selectively switching the drive current controller (102, 302) from an active state for supplying current to the high current load (110), to an-inactive state for inhibiting the supply of current to the high current load (110). The drive current controller (102, 302) further controls the amount of current supplied to the high current load (110) when the battery (112) terminal voltage is substantially equal to the reference voltage. A load control element (108) is coupled to the drive current controller (102, 302) and drives the high current load (110) when the drive current controller (102, 302) is in the active state.

    摘要翻译: 用于驱动由电池(112)供电的电子设备中的高电流负载(110)的高电流驱动器(100)包括用于产生参考电压的电压基准(104)和驱动电流控制器(102,302) 响应于用于选择性地将驱动电流控制器(102,302)从用于向高电流负载(110)提供电流的有效状态切换到用于禁止向高电流负载提供电流的非活动状态的驱动控制信号 (110)。 当电池(112)端子电压基本上等于参考电压时,驱动电流控制器(102,302)进一步控制提供给高电流负载(110)的电流量。 当驱动电流控制器(102,302)处于活动状态时,负载控制元件(108)耦合到驱动电流控制器(102,302)并驱动高电流负载(110)。

    Strobed DC-DC converter with current regulation
    18.
    发明授权
    Strobed DC-DC converter with current regulation 失效
    带电流调节的Strobed DC-DC转换器

    公开(公告)号:US5028861A

    公开(公告)日:1991-07-02

    申请号:US356089

    申请日:1989-05-24

    IPC分类号: H02M3/156

    CPC分类号: H02M3/156

    摘要: A DC-DC converter regulates the maximum current through an inductor. The DC-DC converter operates within a paging receiver and boosts a voltage from a single cell battery to substantially 3.1 VDC in order to operate circuits which require more voltage than that produced by the single cell battery. Such circuits include CMOS microcomputers and code plug. The DC-DC converter is current regulated thus providing for improved power conversion efficiency. The DC-DC converter is active when the voltage is below a minimum voltage and inactive when above a maximum voltage. The DC-DC converter provides for a wide range of load currents from the converted voltage without being controlled by a microcomputer and while delivering the power to the loads with an improved efficiency.

    摘要翻译: DC-DC转换器调节通过电感器的最大电流。 DC-DC转换器在寻呼接收机内工作,并且将单个电池的电压升压至基本上为3.1VDC,以便操作需要比单电池产生的电压更多的电压的电路。 这样的电路包括CMOS微型计算机和代码插头。 DC-DC转换器是电流调节的,因此提供了改进的功率转换效率。 当电压低于最小电压时,DC-DC转换器有效,当高于最大电压时,DC-DC转换器无效。 DC-DC转换器提供来自转换电压的宽范围的负载电流,而不受微型计算机的控制,同时以更高的效率向负载供电。

    Inductively loaded switching transistor circuit
    20.
    发明授权
    Inductively loaded switching transistor circuit 失效
    感应负载开关晶体管电路

    公开(公告)号:US4961006A

    公开(公告)日:1990-10-02

    申请号:US369877

    申请日:1989-06-22

    IPC分类号: H01H47/32 H02M1/08 H03K17/042

    摘要: An inductively loaded switching transistor circuit for use in the DC-DC converter includes an inductive load and a switching transistor coupled to the inductive load for conducting current flowing therethrough when the switching transistor is on. A drive circuit is provided which is coupled to the switching transistor for supplying a drive current thereto, and feedback means are provided for adjusting the amount of base drive supplied to the switching transistor from the drive circuit. The drive current is varied substantially linearly with respect to the current flowing through the inductive load.

    摘要翻译: 用于DC-DC转换器的感应负载开关晶体管电路包括电感负载和耦合到感性负载的开关晶体管,用于当开关晶体管导通时导通电流流过其中。 提供驱动电路,其耦合到用于向其提供驱动电流的开关晶体管,并且提供反馈装置,用于调节从驱动电路提供给开关晶体管的基极驱动量。 驱动电流相对于流过感性负载的电流基本线性地变化。