Method of Implanting RFID Tags in Corrugated Paperboard
    12.
    发明申请
    Method of Implanting RFID Tags in Corrugated Paperboard 有权
    RFID标签在瓦楞纸板上的植入方法

    公开(公告)号:US20100224304A1

    公开(公告)日:2010-09-09

    申请号:US12784610

    申请日:2010-05-21

    申请人: Thomas Ernst

    发明人: Thomas Ernst

    IPC分类号: B31B1/90

    摘要: The disclosure concerns a method, an apparatus and a system for producing or equipping paperboard such that information carriers can be implanted between two layers of material, together with a piece of paperboard material produced in this way and a package. In particular, the disclosure concerns the implantation of an information carrier in corrugated paperboard, taking into account cuts that are subsequently to be made in the transverse direction, the distance of the position at which the cross-cuts are made from the position at which the information carriers are applied, and the movement executed by the web of material between the application position and the cross-cutting position.

    摘要翻译: 本公开涉及用于生产或装备纸板的方法,装置和系统,使得信息载体可以植入在两层材料之间,以及以这种方式制造的一块纸板材料和包装。 特别地,本公开涉及将信息载体植入瓦楞纸板中,考虑到随后在横向方向上进行的切割,切割的位置距离从其位置 应用信息载体,并且由应用位置和横切位置之间的材料幅面执行的移动。

    DOUBLE-GATE TRANSISTOR STRUCTURE EQUIPPED WITH A MULTI-BRANCH CHANNEL
    13.
    发明申请
    DOUBLE-GATE TRANSISTOR STRUCTURE EQUIPPED WITH A MULTI-BRANCH CHANNEL 有权
    配有多分支通道的双门极晶体管结构

    公开(公告)号:US20090085119A1

    公开(公告)日:2009-04-02

    申请号:US12238794

    申请日:2008-09-26

    IPC分类号: H01L29/78 H01L21/336

    摘要: Double gate transistor microelectronic device comprising: a support, a structure suited to forming at least one multi-branch channel and comprising a plurality of separate parallel semi-conductor rods and situated in a plane orthogonal to the principal plane of the support, the rods linking a first block suited to forming a source region of the transistor and a second block provided, suited to forming a drain region of the transistor, a first gate electrode situated on one side of said structure against the sides of said semi-conductor rods, a second gate electrode, separate from the first gate and situated on another side of the structure against the opposite sides of the rods, the semi-conductor rods and one or several insulating rods situated between the semi-conductor rods, separating the first gate electrode and the second gate electrode.

    摘要翻译: 双栅晶体管微电子器件包括:支撑体,适于形成至少一个多分支沟道并且包括多个分离的平行半导体棒并且位于与支撑体的主平面正交的平面中的结构,所述杆连接 适于形成所述晶体管的源极区域的第一块和适于形成所述晶体管的漏极区域的第二块,位于所述结构的一侧上的第一栅极抵靠所述半导体棒的侧面, 第二栅极电极,与第一栅极分离,并且位于结构的另一侧,抵靠杆的相对侧,半导体棒和位于半导体棒之间的一个或多个绝缘棒,分离第一栅电极和 第二栅电极。

    Production of a transistor gate on a multibranch channel structure and means for isolating this gate from the source and drain regions
    14.
    发明授权
    Production of a transistor gate on a multibranch channel structure and means for isolating this gate from the source and drain regions 有权
    在多分支沟道结构上制造晶体管栅极以及用于将该栅极与源区和漏极区隔离的装置

    公开(公告)号:US08492232B2

    公开(公告)日:2013-07-23

    申请号:US13190125

    申请日:2011-07-25

    IPC分类号: H01L21/336

    摘要: A method for fabricating a microelectronic device comprising: a support, an etched stack of thin layers comprising: at least one first block and at least one second block resting on the support, in which at least one drain region and at least one source region, respectively, are capable of being formed, several semiconductor bars connecting a first zone of the first block and another zone of the second block, and able to form a multi-branch transistor channel, or several transistor channels, the device also comprising: a gate surrounding said bars and located between said first block and said second block, the gate being in contact with a first and a second insulating spacer in contact with at least one sidewall of the first block and with at least one sidewall of the second block, respectively, and at least partially separated from the first block and the second block, via said insulating spacers.

    摘要翻译: 一种用于制造微电子器件的方法,包括:支撑体,蚀刻的薄层叠层,包括:至少一个第一块和搁置在所述支撑上的至少一个第二块,其中至少一个漏极区和至少一个源极区, 能够形成多个半导体条,连接第一块的第一区和第二块的另一区,并且能够形成多分支晶体管沟道或多个晶体管沟道,该器件还包括:栅极 围绕所述杆并且位于所述第一块和所述第二块之间,所述栅极与分别与所述第一块的至少一个侧壁和所述第二块的至少一个侧壁接触的第一和第二绝缘间隔件接触; 并且经由所述绝缘间隔件至少部分地与第一块和第二块分离。

    Structure and method for fabricating a microelectronic device provided with one or more quantum wires able to form one or more transistor channels
    15.
    发明授权
    Structure and method for fabricating a microelectronic device provided with one or more quantum wires able to form one or more transistor channels 有权
    用于制造具有能够形成一个或多个晶体管通道的一个或多个量子线的微电子器件的结构和方法

    公开(公告)号:US08367487B2

    公开(公告)日:2013-02-05

    申请号:US13020473

    申请日:2011-02-03

    IPC分类号: H01L21/336

    摘要: The disclosure concerns a microelectronic device provided with one or more >, able to form one or more transistor channels, and optimized in terms of arrangement, shape or/and composition. The invention also uses a method for fabricating said device, comprising the steps of: the forming, in one or more thin layers resting on a support, of a first block and a second block in which at least one transistor drain region and at least one transistor source region are respectively intended to be formed, and of a structure connecting the first block to the second block, and the forming, on the surface of the structure, of wires connecting a first region of the first block with another region of the second block which faces the first region.

    摘要翻译: 本公开涉及具有一个或多个“量子线”的微电子器件,其能够形成一个或多个晶体管沟道,并且在排列,形状或/和组成方面进行优化。 本发明还使用制造所述器件的方法,包括以下步骤:在一个或多个位于支撑体上的薄层中形成第一块和第二块,其中至少一个晶体管漏极区和至少一个晶体管漏极区 分别旨在形成晶体管源极区域,以及将第一块体与第二块体连接的结构,以及在结构的表面上形成将第一块体的第一区域与第二块体的第二区域的另一区域连接的线材 面向第一区域的块。

    Fabrication of Active Areas of Different Natures Directly Onto an Insulator: Application to the Single or Double Gate Mos Transistor
    18.
    发明申请
    Fabrication of Active Areas of Different Natures Directly Onto an Insulator: Application to the Single or Double Gate Mos Transistor 有权
    直接在绝缘体上制造不同性质的有源区域:应用于单栅极或双栅极晶体管

    公开(公告)号:US20070246702A1

    公开(公告)日:2007-10-25

    申请号:US11579037

    申请日:2004-06-25

    IPC分类号: H01L21/84

    摘要: The invention concerns a micro-electronic device comprising a substrate, a first insulating zone and a second insulating zone laying on said substrate, a first active zone comprising at least one layer made of a first semi-conductor crystalline material, resting on said first insulating zone which insulates it from the substrate, at least one second active zone comprising at least one layer in a second semi-conductor crystalline material, laying on said second insulating zone which insulates it from the substrate, said first semi-conductor crystalline material having a different composition from that of the second semi-conductor crystalline material and/or different crystalline orientation from that of the second semi-conductor crystalline material and/or mechanical strains from that of the second semi-conductor crystalline material.

    摘要翻译: 本发明涉及一种包括衬底,第一绝缘区和布置在所述衬底上的第二绝缘区的微电子器件,第一有源区包括由第一半导体晶体材料制成的至少一层,位于所述第一绝缘层上 所述第一半导体结晶材料具有与基底绝缘的区域,至少一个第二活性区域,包括在第二半导体结晶材料中的至少一个层,铺设在所述第二绝缘区域上, 与第二半导体结晶材料不同的组成和/或与第二半导体结晶材料不同的晶体取向和/或来自第二半导体晶体材料的机械应变。

    Endoscopic instrument
    20.
    发明申请
    Endoscopic instrument 有权
    内窥镜仪器

    公开(公告)号:US20060063975A1

    公开(公告)日:2006-03-23

    申请号:US11231172

    申请日:2005-09-20

    IPC分类号: A61B1/015

    摘要: An endoscopic instrument with a hollow shank which on the proximal side is provided with a connection part with at least one suction connection and/or rinsing connection, with a coupling part for fixing a working insert. The coupling part is mounted rotatably with respect to the connection part. The endoscopic instrument furthermore includes means for the detachable connection of the coupling part and the connection part, as well as an annular axial seal which is arranged between the connection part and the coupling part.

    摘要翻译: 具有中空柄的内窥镜器械,其在近侧设置有具有至少一个吸入连接和/或冲洗连接的连接部分,其具有用于固定工作插入件的联接部件。 联接部分相对于连接部分可旋转地安装。 内窥镜器具还包括用于联接部分和连接部分的可拆卸连接的装置,以及布置在连接部分和联接部分之间的环形轴向密封件。